================ @@ -0,0 +1,24 @@ +//===-- RISCVInstrInfoSmcsps.td ----------------------------*- tablegen -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in +class CSPSInst<bits<7> funct7, bits<5> funct5, string opcodestr> + : RVInstR<funct7, 0b000, OPC_SYSTEM, (outs SP:$rd), (ins SP:$rs1), + opcodestr, "$rd, $rs1">, Sched<[]> { + let rs2 = funct5; +} + +let Predicates = [HasStdExtSmcsps] in { +def MCSPSPUSH : CSPSInst<0b0011000, 0b01001, "mcspspush">; ---------------- zeyi2 wrote:
The encodings for these four instructions are specified here: - https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L1352-L1365 - https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L1394-L1407 - https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L1438-L1451 - https://github.com/riscv/riscv-fast-interrupt/blob/603f1693a6f7d4ad9d878b58ec5a514708f00fe3/src/aclic.adoc?plain=1#L1480-L1493 https://github.com/llvm/llvm-project/pull/211712 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
