xiaoxiang781216 commented on code in PR #16941:
URL: https://github.com/apache/nuttx/pull/16941#discussion_r2312232251
##########
arch/arm/src/imxrt/hardware/imxrt_usbotg.h:
##########
@@ -733,4 +736,16 @@
/* Bit 30: Reserved */
#define USBNC_WIR (1 << 31) /* Bit 31: Wake up
interrupt request */
+/* USB VBUS 3.0 Regulator */
+
+#define IMXRT_PMU_REG_3P0 0x120
+
+#define PMU_REG_3P0_OUTPUT_TRG_SHIFT (8)
+#define PMU_REG_3P0_OUTPUT_TRG_MASK (0x1f <<
PMU_REG_3P0_OUTPUT_TRG_SHIFT)
+#define PMU_REG_3P0_OUTPUT_TRG(x) (x <<
PMU_REG_3P0_OUTPUT_TRG_SHIFT)
+
+#define PMU_REG_3P0_ENABLE_LINREG (1 << 0)
+
+#define IMXRT_USBVBUS_REG_3P0 (IMXRT_ANATOP_BASE + IMXRT_PMU_REG_3P0)
Review Comment:
align with other line
##########
arch/arm/src/imxrt/hardware/imxrt_usbotg.h:
##########
@@ -121,64 +121,67 @@
#define IMXRT_USBNC_USB_OTG1_CTRL_OFFSET 0x0800 /* OTG1 Control
Register */
#define IMXRT_USBNC_USB_OTG1_PHY_CTRL_0_OFFSET 0x0818 /* OTG1 Phy Control
Register */
+#define IMXRT_USBNC_USB_OTG2_CTRL_OFFSET 0x0804 /* OTG1 Control
Register */
+#define IMXRT_USBNC_USB_OTG2_PHY_CTRL_0_OFFSET 0x081c /* OTG1 Phy Control
Register */
+
/* USBOTG register (virtual) addresses **************************************/
/* Device/host capability registers */
-#define IMXRT_USBOTG_HCCR_BASE (IMXRT_USB_BASE +
IMXRT_USBOTG_HCCR_OFFSET)
-#define IMXRT_USBOTG_CAPLENGTH (IMXRT_USB_BASE +
IMXRT_USBOTG_CAPLENGTH_OFFSET)
-#define IMXRT_USBHOST_HCIVERSION (IMXRT_USB_BASE +
IMXRT_USBHOST_HCIVERSION_OFFSET)
-#define IMXRT_USBHOST_HCSPARAMS (IMXRT_USB_BASE +
IMXRT_USBHOST_HCSPARAMS_OFFSET)
-#define IMXRT_USBHOST_HCCPARAMS (IMXRT_USB_BASE +
IMXRT_USBHOST_HCCPARAMS_OFFSET)
-#define IMXRT_USBDEV_DCIVERSION (IMXRT_USB_BASE +
IMXRT_USBDEV_DCIVERSION_OFFSET)
-#define IMXRT_USBDEV_DCCPARAMS (IMXRT_USB_BASE +
IMXRT_USBDEV_DCCPARAMS_OFFSET)
+#define IMXRT_USBOTG_HCCR_BASE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_HCCR_OFFSET)
+#define IMXRT_USBOTG_CAPLENGTH(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_CAPLENGTH_OFFSET)
+#define IMXRT_USBHOST_HCIVERSION(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBHOST_HCIVERSION_OFFSET)
+#define IMXRT_USBHOST_HCSPARAMS(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBHOST_HCSPARAMS_OFFSET)
+#define IMXRT_USBHOST_HCCPARAMS(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBHOST_HCCPARAMS_OFFSET)
+#define IMXRT_USBDEV_DCIVERSION(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_DCIVERSION_OFFSET)
+#define IMXRT_USBDEV_DCCPARAMS(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_DCCPARAMS_OFFSET)
/* Device/host operational registers */
-#define IMXRT_USBOTG_HCOR_BASE (IMXRT_USB_BASE +
IMXRT_USBOTG_HCOR_OFFSET)
-#define IMXRT_USBOTG_USBCMD (IMXRT_USB_BASE +
IMXRT_USBOTG_USBCMD_OFFSET)
-#define IMXRT_USBOTG_USBSTS (IMXRT_USB_BASE +
IMXRT_USBOTG_USBSTS_OFFSET)
-#define IMXRT_USBOTG_USBINTR (IMXRT_USB_BASE +
IMXRT_USBOTG_USBINTR_OFFSET)
-#define IMXRT_USBOTG_FRINDEX (IMXRT_USB_BASE +
IMXRT_USBOTG_FRINDEX_OFFSET)
-#define IMXRT_USBOTG_PERIODICLIST (IMXRT_USB_BASE +
IMXRT_USBOTG_PERIODICLIST_OFFSET)
-#define IMXRT_USBOTG_DEVICEADDR (IMXRT_USB_BASE +
IMXRT_USBOTG_DEVICEADDR_OFFSET)
-#define IMXRT_USBOTG_ASYNCLISTADDR (IMXRT_USB_BASE +
IMXRT_USBOTG_ASYNCLISTADDR_OFFSET)
-#define IMXRT_USBOTG_ENDPOINTLIST (IMXRT_USB_BASE +
IMXRT_USBOTG_ENDPOINTLIST_OFFSET)
-#define IMXRT_USBOTG_TTCTRL (IMXRT_USB_BASE +
IMXRT_USBOTG_TTCTRL_OFFSET)
-#define IMXRT_USBOTG_BURSTSIZE (IMXRT_USB_BASE +
IMXRT_USBOTG_BURSTSIZE_OFFSET)
-#define IMXRT_USBOTG_TXFILLTUNING (IMXRT_USB_BASE +
IMXRT_USBOTG_TXFILLTUNING_OFFSET)
-#define IMXRT_USBOTG_BINTERVAL (IMXRT_USB_BASE +
IMXRT_USBOTG_BINTERVAL_OFFSET)
-#define IMXRT_USBOTG_ENDPTNAK (IMXRT_USB_BASE +
IMXRT_USBOTG_ENDPTNAK_OFFSET)
-#define IMXRT_USBOTG_ENDPTNAKEN (IMXRT_USB_BASE +
IMXRT_USBOTG_ENDPTNAKEN_OFFSET)
-#define IMXRT_USBOTG_PORTSC1 (IMXRT_USB_BASE +
IMXRT_USBOTG_PORTSC1_OFFSET)
-#define IMXRT_USBOTG_OTGSC (IMXRT_USB_BASE +
IMXRT_USBOTG_OTGSC_OFFSET)
-#define IMXRT_USBOTG_USBMODE (IMXRT_USB_BASE +
IMXRT_USBOTG_USBMODE_OFFSET)
-
-#define IMXRT_USBDEV_USBCMD (IMXRT_USB_BASE +
IMXRT_USBDEV_USBCMD_OFFSET)
-#define IMXRT_USBDEV_USBSTS (IMXRT_USB_BASE +
IMXRT_USBDEV_USBSTS_OFFSET)
-#define IMXRT_USBDEV_USBINTR (IMXRT_USB_BASE +
IMXRT_USBDEV_USBINTR_OFFSET)
-#define IMXRT_USBDEV_FRINDEX (IMXRT_USB_BASE +
IMXRT_USBDEV_FRINDEX_OFFSET)
-#define IMXRT_USBDEV_DEVICEADDR (IMXRT_USB_BASE +
IMXRT_USBDEV_DEVICEADDR_OFFSET)
-#define IMXRT_USBDEV_ENDPOINTLIST (IMXRT_USB_BASE +
IMXRT_USBDEV_ENDPOINTLIST_OFFSET)
-#define IMXRT_USBDEV_BURSTSIZE (IMXRT_USB_BASE +
IMXRT_USBDEV_BURSTSIZE_OFFSET)
-#define IMXRT_USBDEV_BINTERVAL (IMXRT_USB_BASE +
IMXRT_USBDEV_BINTERVAL_OFFSET)
-#define IMXRT_USBDEV_ENDPTNAK (IMXRT_USB_BASE +
IMXRT_USBDEV_ENDPTNAK_OFFSET)
-#define IMXRT_USBDEV_ENDPTNAKEN (IMXRT_USB_BASE +
IMXRT_USBDEV_ENDPTNAKEN_OFFSET)
-#define IMXRT_USBDEV_PORTSC1 (IMXRT_USB_BASE +
IMXRT_USBDEV_PORTSC1_OFFSET)
-#define IMXRT_USBDEV_USBMODE (IMXRT_USB_BASE +
IMXRT_USBDEV_USBMODE_OFFSET)
-
-#define IMXRT_USBHOST_USBCMD (IMXRT_USB_BASE +
IMXRT_USBHOST_USBCMD_OFFSET)
-#define IMXRT_USBHOST_USBSTS (IMXRT_USB_BASE +
IMXRT_USBHOST_USBSTS_OFFSET)
-#define IMXRT_USBHOST_USBINTR (IMXRT_USB_BASE +
IMXRT_USBHOST_USBINTR_OFFSET)
-#define IMXRT_USBHOST_FRINDEX (IMXRT_USB_BASE +
IMXRT_USBHOST_FRINDEX_OFFSET)
-#define IMXRT_USBHOST_PERIODICLIST (IMXRT_USB_BASE +
IMXRT_USBHOST_PERIODICLIST_OFFSET)
-#define IMXRT_USBHOST_ASYNCLISTADDR (IMXRT_USB_BASE +
IMXRT_USBHOST_ASYNCLISTADDR_OFFSET)
-#define IMXRT_USBHOST_TTCTRL (IMXRT_USB_BASE +
IMXRT_USBHOST_TTCTRL_OFFSET)
-#define IMXRT_USBHOST_BURSTSIZE (IMXRT_USB_BASE +
IMXRT_USBHOST_BURSTSIZE_OFFSET)
-#define IMXRT_USBHOST_TXFILLTUNING (IMXRT_USB_BASE +
IMXRT_USBHOST_TXFILLTUNING_OFFSET)
-#define IMXRT_USBHOST_BINTERVAL (IMXRT_USB_BASE +
IMXRT_USBHOST_BINTERVAL_OFFSET)
-#define IMXRT_USBHOST_PORTSC1 (IMXRT_USB_BASE +
IMXRT_USBHOST_PORTSC1_OFFSET)
-#define IMXRT_USBHOST_USBMODE (IMXRT_USB_BASE +
IMXRT_USBHOST_USBMODE_OFFSET)
+#define IMXRT_USBOTG_HCOR_BASE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_HCOR_OFFSET)
+#define IMXRT_USBOTG_USBCMD(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_USBCMD_OFFSET)
+#define IMXRT_USBOTG_USBSTS(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_USBSTS_OFFSET)
+#define IMXRT_USBOTG_USBINTR(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_USBINTR_OFFSET)
+#define IMXRT_USBOTG_FRINDEX(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_FRINDEX_OFFSET)
+#define IMXRT_USBOTG_PERIODICLIST(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_PERIODICLIST_OFFSET)
+#define IMXRT_USBOTG_DEVICEADDR(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_DEVICEADDR_OFFSET)
+#define IMXRT_USBOTG_ASYNCLISTADDR(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_ASYNCLISTADDR_OFFSET)
+#define IMXRT_USBOTG_ENDPOINTLIST(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_ENDPOINTLIST_OFFSET)
+#define IMXRT_USBOTG_TTCTRL(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_TTCTRL_OFFSET)
+#define IMXRT_USBOTG_BURSTSIZE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_BURSTSIZE_OFFSET)
+#define IMXRT_USBOTG_TXFILLTUNING(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_TXFILLTUNING_OFFSET)
+#define IMXRT_USBOTG_BINTERVAL(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_BINTERVAL_OFFSET)
+#define IMXRT_USBOTG_ENDPTNAK(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_ENDPTNAK_OFFSET)
+#define IMXRT_USBOTG_ENDPTNAKEN(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_ENDPTNAKEN_OFFSET)
+#define IMXRT_USBOTG_PORTSC1(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_PORTSC1_OFFSET)
+#define IMXRT_USBOTG_OTGSC(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_OTGSC_OFFSET)
+#define IMXRT_USBOTG_USBMODE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBOTG_USBMODE_OFFSET)
+
+#define IMXRT_USBDEV_USBCMD(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_USBCMD_OFFSET)
+#define IMXRT_USBDEV_USBSTS(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_USBSTS_OFFSET)
+#define IMXRT_USBDEV_USBINTR(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_USBINTR_OFFSET)
+#define IMXRT_USBDEV_FRINDEX(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_FRINDEX_OFFSET)
+#define IMXRT_USBDEV_DEVICEADDR(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_DEVICEADDR_OFFSET)
+#define IMXRT_USBDEV_ENDPOINTLIST(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_ENDPOINTLIST_OFFSET)
+#define IMXRT_USBDEV_BURSTSIZE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_BURSTSIZE_OFFSET)
+#define IMXRT_USBDEV_BINTERVAL(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_BINTERVAL_OFFSET)
+#define IMXRT_USBDEV_ENDPTNAK(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_ENDPTNAK_OFFSET)
+#define IMXRT_USBDEV_ENDPTNAKEN(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_ENDPTNAKEN_OFFSET)
+#define IMXRT_USBDEV_PORTSC1(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_PORTSC1_OFFSET)
+#define IMXRT_USBDEV_USBMODE(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBDEV_USBMODE_OFFSET)
+
+#define IMXRT_USBHOST_USBCMD(n) (IMXRT_USB_BASE + (0x200 * n) +
IMXRT_USBHOST_USBCMD_OFFSET)
Review Comment:
add () around n
##########
arch/arm/src/imxrt/hardware/imxrt_usbphy.h:
##########
@@ -34,30 +34,25 @@
* Pre-processor Definitions
****************************************************************************/
-#define IMXRT_USBPHY_BASE (IMXRT_USBPHY1_BASE) /* USB PHY
Base */
+#define IMXRT_USBPHY_BASE_OFFSET 0x1000 /* USB1 PHY Base */
+#define IMXRT_USBPHY2_BASE_OFFSET 0x2000 /* USB2 PHY Base */
-/* Register Offsets *********************************************************/
+#define IMXRT_USBPHY_BASE (IMXRT_ANATOP_BASE +
IMXRT_USBPHY_BASE_OFFSET) /* USB PHY Base */
+#define IMXRT_USBPHY2_BASE (IMXRT_ANATOP_BASE +
IMXRT_USBPHY2_BASE_OFFSET) /* USB PHY Base */
-#define IMXRT_USBPHY1_PWD_OFFSET 0x0000 /* USBPHY1 USB PHY
Power-Down Register */
-#define IMXRT_USBPHY1_PWD_CLR_OFFSET 0x0008 /* USBPHY1 USB PHY
Power-Down Register Clear */
-#define IMXRT_USBPHY1_CTRL_OFFSET 0x0030 /* USBPHY1 USB PHY General
Control Register */
-#define IMXRT_USBPHY1_CTRL_CLR_OFFSET 0x0038 /* USBPHY1 USB PHY General
Control Register Clear */
+/* Register Offsets *********************************************************/
-#define IMXRT_USBPHY1_PLL_SIC_OFFSET 0x00a0
-#define IMXRT_USBPHY1_PLL_SIC_SET_OFFSET 0x00a4
-#define IMXRT_USBPHY1_PLL_SIC_CLR_OFFSET 0x00a8
-#define IMXRT_USBPHY1_PLL_SIC_TOG_OFFSET 0x00ac
+#define IMXRT_USBPHY_PWD_OFFSET 0x0000 /* USBPHY1/2 USB PHY
Power-Down Register */
Review Comment:
align too
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