This is an automated email from the ASF dual-hosted git repository. xiaoxiang781216 pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 0de50ad42e933de651c2e1da78ca2b528cf7314d Author: raiden00pl <[email protected]> AuthorDate: Sun Aug 16 11:13:37 2026 +0200 arch/arm/stm32h7: use common Kconfig symbols CONFIG_STM32H7_LCD_BACKLIGHT is not defined by any Kconfig, so the LTDC backlight control is dead code. Use CONFIG_STM32_LTDC_BACKLIGHT. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- arch/arm/include/stm32h7/chip.h | 8 ++-- arch/arm/src/stm32h7/stm32_adc.h | 4 +- arch/arm/src/stm32h7/stm32_bbsram.h | 2 +- arch/arm/src/stm32h7/stm32_ethernet.c | 8 ++-- arch/arm/src/stm32h7/stm32_irq.c | 8 ++-- arch/arm/src/stm32h7/stm32_iwdg.c | 34 +++++++------- arch/arm/src/stm32h7/stm32_ltdc.c | 26 +++++------ arch/arm/src/stm32h7/stm32_ltdc.h | 4 +- arch/arm/src/stm32h7/stm32_otgdev.c | 2 +- arch/arm/src/stm32h7/stm32_otghost.c | 52 +++++++++++----------- arch/arm/src/stm32h7/stm32_pwm.c | 48 ++++++++++---------- arch/arm/src/stm32h7/stm32_pwm.h | 8 ++-- arch/arm/src/stm32h7/stm32_qencoder.h | 20 ++++----- arch/arm/src/stm32h7/stm32_tim.c | 44 +++++++++--------- arch/arm/src/stm32h7/stm32_usbhost.h | 8 ++-- arch/arm/src/stm32h7/stm32_wwdg.c | 14 +++--- arch/arm/src/stm32h7/stm32h743xx_flash.c | 4 +- arch/arm/src/stm32h7/stm32h7b3xx_flash.c | 4 +- .../stm32h7/devebox-stm32h743/src/CMakeLists.txt | 2 +- boards/arm/stm32h7/nucleo-h723zg/src/stm32_boot.c | 2 +- boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot.c | 2 +- boards/arm/stm32h7/nucleo-h743zi2/src/stm32_boot.c | 2 +- boards/arm/stm32h7/nucleo-h745zi/src/stm32_boot.c | 2 +- boards/arm/stm32h7/nucleo-h753zi/src/stm32_boot.c | 2 +- boards/arm/stm32h7/openh743i/src/stm32_boot.c | 2 +- .../arm/stm32h7/stm32h745i-disco/src/stm32_boot.c | 2 +- .../arm/stm32h7/stm32h747i-disco/src/stm32_boot.c | 2 +- boards/arm/stm32h7/stm32h750b-dk/src/stm32_boot.c | 2 +- 28 files changed, 159 insertions(+), 159 deletions(-) diff --git a/arch/arm/include/stm32h7/chip.h b/arch/arm/include/stm32h7/chip.h index aab8d553109..d2981d6bc12 100644 --- a/arch/arm/include/stm32h7/chip.h +++ b/arch/arm/include/stm32h7/chip.h @@ -51,8 +51,8 @@ * * Parts STM32H7xxxI have 2048Kb of FLASH * - * The correct FLASH size will be set CONFIG_STM32H7_FLASH_CONFIG_x or - * overridden with CONFIG_STM32H7_FLASH_OVERRIDE_x + * The correct FLASH size will be set CONFIG_STM32_FLASH_CONFIG_x or + * overridden with CONFIG_STM32_FLASH_OVERRIDE_x */ #if defined (CONFIG_ARCH_CHIP_STM32H723VG) || \ @@ -135,7 +135,7 @@ # elif defined(CONFIG_STM32H7_IO_CONFIG_Z) # define STM32_NGPIO (8) /* GPIOA-GPIOH */ # else -# error CONFIG_STM32H7_IO_CONFIG_x Not Set +# error CONFIG_STM32_IO_CONFIG_x Not Set # endif # define STM32_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */ @@ -189,7 +189,7 @@ # elif defined(CONFIG_STM32H7_IO_CONFIG_Z) # define STM32_NGPIO (8) /* GPIOA-GPIOH */ # else -# error CONFIG_STM32H7_IO_CONFIG_x Not Set +# error CONFIG_STM32_IO_CONFIG_x Not Set # endif # define STM32_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */ diff --git a/arch/arm/src/stm32h7/stm32_adc.h b/arch/arm/src/stm32h7/stm32_adc.h index f53d5828aab..ae1969a2f5f 100644 --- a/arch/arm/src/stm32h7/stm32_adc.h +++ b/arch/arm/src/stm32h7/stm32_adc.h @@ -39,8 +39,8 @@ /* Configuration ************************************************************/ /* Timer devices may be used for different purposes. One special purpose is - * to control periodic ADC sampling. If CONFIG_STM32H7_TIMn is defined then - * CONFIG_STM32H7_TIMn_ADC must also be defined to indicate that timer "n" + * to control periodic ADC sampling. If CONFIG_STM32_TIMn is defined then + * CONFIG_STM32_TIMn_ADC must also be defined to indicate that timer "n" * is intended to be used for that purpose. Timers 1,2,3,6 and 15 may be * used on STM32H7X3, while STM32H7X6 adds support for timers 4 and 8 as * well. diff --git a/arch/arm/src/stm32h7/stm32_bbsram.h b/arch/arm/src/stm32h7/stm32_bbsram.h index cecff041fa7..23c01b59c8b 100644 --- a/arch/arm/src/stm32h7/stm32_bbsram.h +++ b/arch/arm/src/stm32h7/stm32_bbsram.h @@ -25,7 +25,7 @@ /**************************************************************************** * The purpose of this driver is to add battery backup file to the file - * system. There can be CONFIG_STM32H7_BBRSRAM_COUNT files defined. + * system. There can be CONFIG_STM32_BBRSRAM_COUNT files defined. * These files are of fixed size up to the maximum of the backing 4K SRAM. * * If CONFIG_SAVE_CRASHDUMP is defined The driver also supports a feature diff --git a/arch/arm/src/stm32h7/stm32_ethernet.c b/arch/arm/src/stm32h7/stm32_ethernet.c index abb490cf59f..2ae195bf09b 100644 --- a/arch/arm/src/stm32h7/stm32_ethernet.c +++ b/arch/arm/src/stm32h7/stm32_ethernet.c @@ -95,9 +95,9 @@ /* Select work queue */ -# if defined(CONFIG_STM32H7_ETHMAC_HPWORK) +# if defined(CONFIG_STM32_ETHMAC_HPWORK) # define ETHWORK HPWORK -# elif defined(CONFIG_STM32H7_ETHMAC_LPWORK) +# elif defined(CONFIG_STM32_ETHMAC_LPWORK) # define ETHWORK LPWORK # else # define ETHWORK LPWORK @@ -244,8 +244,8 @@ #define OPTIMAL_ETH_BUFSIZE ((CONFIG_NET_ETH_PKTSIZE + 4 + 15) & ~15) -#ifdef CONFIG_STM32H7_ETH_BUFSIZE -# define ETH_BUFSIZE CONFIG_STM32H7_ETH_BUFSIZE +#ifdef CONFIG_STM32_ETH_BUFSIZE +# define ETH_BUFSIZE CONFIG_STM32_ETH_BUFSIZE #else # define ETH_BUFSIZE OPTIMAL_ETH_BUFSIZE #endif diff --git a/arch/arm/src/stm32h7/stm32_irq.c b/arch/arm/src/stm32h7/stm32_irq.c index 2bcf4b9cc7e..37da642357f 100644 --- a/arch/arm/src/stm32h7/stm32_irq.c +++ b/arch/arm/src/stm32h7/stm32_irq.c @@ -40,7 +40,7 @@ #include "ram_vectors.h" #include "arm_internal.h" -#ifdef CONFIG_STM32H7_GPIO_IRQ +#ifdef CONFIG_STM32_GPIO_IRQ # include "stm32_gpio.h" #endif @@ -404,7 +404,7 @@ void up_irqinitialize(void) * GPIO pins. */ -#ifdef CONFIG_STM32H7_GPIO_IRQ +#ifdef CONFIG_STM32_GPIO_IRQ stm32_gpioirqinitialize(); #endif @@ -448,7 +448,7 @@ void up_disable_irq(int irq) putreg32(regval, regaddr); } } -#ifdef CONFIG_STM32H7_GPIO_IRQ +#ifdef CONFIG_STM32_GPIO_IRQ else { /* Maybe it is a (derived) GPIO IRQ */ @@ -495,7 +495,7 @@ void up_enable_irq(int irq) putreg32(regval, regaddr); } } -#ifdef CONFIG_STM32H7_GPIO_IRQ +#ifdef CONFIG_STM32_GPIO_IRQ else { /* Maybe it is a (derived) GPIO IRQ */ diff --git a/arch/arm/src/stm32h7/stm32_iwdg.c b/arch/arm/src/stm32h7/stm32_iwdg.c index 39212b5a753..299b40ae68e 100644 --- a/arch/arm/src/stm32h7/stm32_iwdg.c +++ b/arch/arm/src/stm32h7/stm32_iwdg.c @@ -69,12 +69,12 @@ /* Configuration ************************************************************/ -#ifndef CONFIG_STM32H7_IWDG_DEFTIMOUT -# define CONFIG_STM32H7_IWDG_DEFTIMOUT IWDG_MAXTIMEOUT +#ifndef CONFIG_STM32_IWDG_DEFTIMOUT +# define CONFIG_STM32_IWDG_DEFTIMOUT IWDG_MAXTIMEOUT #endif #ifndef CONFIG_DEBUG_WATCHDOG_INFO -# undef CONFIG_STM32H7_IWDG_REGDEBUG +# undef CONFIG_STM32_IWDG_REGDEBUG #endif /* REVISIT: It appears that you can only setup the prescaler and reload @@ -83,19 +83,19 @@ * is started, then refuse any further attempts to change timeout. */ -#define CONFIG_STM32H7_IWDG_ONETIMESETUP 1 +#define CONFIG_STM32_IWDG_ONETIMESETUP 1 /* REVISIT: Another possibility is that we CAN change the prescaler and * reload values after starting the timer. This option is untested but the * implementation place conditioned on the following: */ -#undef CONFIG_STM32H7_IWDG_DEFERREDSETUP +#undef CONFIG_STM32_IWDG_DEFERREDSETUP /* But you can only try one at a time */ -#if defined(CONFIG_STM32H7_IWDG_ONETIMESETUP) && defined(CONFIG_STM32H7_IWDG_DEFERREDSETUP) -# error "Both CONFIG_STM32H7_IWDG_ONETIMESETUP and CONFIG_STM32H7_IWDG_DEFERREDSETUP are defined" +#if defined(CONFIG_STM32_IWDG_ONETIMESETUP) && defined(CONFIG_STM32_IWDG_DEFERREDSETUP) +# error "Both CONFIG_STM32_IWDG_ONETIMESETUP and CONFIG_STM32_IWDG_DEFERREDSETUP are defined" #endif /**************************************************************************** @@ -124,7 +124,7 @@ struct stm32_lowerhalf_s /* Register operations ******************************************************/ -#ifdef CONFIG_STM32H7_IWDG_REGDEBUG +#ifdef CONFIG_STM32_IWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint16_t val, uint32_t addr); #else @@ -177,7 +177,7 @@ static struct stm32_lowerhalf_s g_wdgdev; * ****************************************************************************/ -#ifdef CONFIG_STM32H7_IWDG_REGDEBUG +#ifdef CONFIG_STM32_IWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -240,7 +240,7 @@ static uint16_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#ifdef CONFIG_STM32H7_IWDG_REGDEBUG +#ifdef CONFIG_STM32_IWDG_REGDEBUG static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ @@ -280,7 +280,7 @@ static inline void stm32_setprescaler(struct stm32_lowerhalf_s *priv) * be necessary. */ -#ifndef CONFIG_STM32H7_IWDG_ONETIMESETUP +#ifndef CONFIG_STM32_IWDG_ONETIMESETUP while ((stm32_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU)) != 0); #endif @@ -335,7 +335,7 @@ static int stm32_start(struct watchdog_lowerhalf_s *lower) * starting the watchdog timer. */ -#if defined(CONFIG_STM32H7_IWDG_ONETIMESETUP) || defined(CONFIG_STM32H7_IWDG_DEFERREDSETUP) +#if defined(CONFIG_STM32_IWDG_ONETIMESETUP) || defined(CONFIG_STM32_IWDG_DEFERREDSETUP) stm32_setprescaler(priv); #endif @@ -512,7 +512,7 @@ static int stm32_settimeout(struct watchdog_lowerhalf_s *lower, * to zero. */ -#ifdef CONFIG_STM32H7_IWDG_ONETIMESETUP +#ifdef CONFIG_STM32_IWDG_ONETIMESETUP if (priv->started) { wdwarn("WARNING: Timer is already started\n"); @@ -597,12 +597,12 @@ static int stm32_settimeout(struct watchdog_lowerhalf_s *lower, * to zero. */ -#ifndef CONFIG_STM32H7_IWDG_ONETIMESETUP - /* If CONFIG_STM32H7_IWDG_DEFERREDSETUP is selected, then perform the +#ifndef CONFIG_STM32_IWDG_ONETIMESETUP + /* If CONFIG_STM32_IWDG_DEFERREDSETUP is selected, then perform the * register configuration only if the timer has been started. */ -#ifdef CONFIG_STM32H7_IWDG_DEFERREDSETUP +#ifdef CONFIG_STM32_IWDG_DEFERREDSETUP if (priv->started) #endif { @@ -670,7 +670,7 @@ void stm32_iwdginitialize(const char *devpath, uint32_t lsifreq) */ stm32_settimeout((struct watchdog_lowerhalf_s *)priv, - CONFIG_STM32H7_IWDG_DEFTIMOUT); + CONFIG_STM32_IWDG_DEFTIMOUT); /* Register the watchdog driver as /dev/watchdog0 */ diff --git a/arch/arm/src/stm32h7/stm32_ltdc.c b/arch/arm/src/stm32h7/stm32_ltdc.c index 4eeccc47035..f1c6adf0b33 100644 --- a/arch/arm/src/stm32h7/stm32_ltdc.c +++ b/arch/arm/src/stm32h7/stm32_ltdc.c @@ -216,36 +216,36 @@ #endif #ifdef CONFIG_STM32_LTDC_L2 -# ifndef CONFIG_STM32H7_LTDC_L2_WIDTH -# define CONFIG_STM32H7_LTDC_L2_WIDTH STM32_LTDC_WIDTH +# ifndef CONFIG_STM32_LTDC_L2_WIDTH +# define CONFIG_STM32_LTDC_L2_WIDTH STM32_LTDC_WIDTH # endif -# if CONFIG_STM32H7_LTDC_L2_WIDTH > STM32_LTDC_WIDTH +# if CONFIG_STM32_LTDC_L2_WIDTH > STM32_LTDC_WIDTH # error Width of Layer 2 exceeds the width of the display # endif -# ifndef CONFIG_STM32H7_LTDC_L2_HEIGHT -# define CONFIG_STM32H7_LTDC_L2_HEIGHT STM32_LTDC_HEIGHT +# ifndef CONFIG_STM32_LTDC_L2_HEIGHT +# define CONFIG_STM32_LTDC_L2_HEIGHT STM32_LTDC_HEIGHT # endif -# if CONFIG_STM32H7_LTDC_L2_HEIGHT > STM32_LTDC_HEIGHT +# if CONFIG_STM32_LTDC_L2_HEIGHT > STM32_LTDC_HEIGHT # error Height of Layer 2 exceeds the height of the display # endif # if STM32_LTDC_L2_BPP == 8 -# define STM32_LTDC_L2_STRIDE (CONFIG_STM32H7_LTDC_L2_WIDTH) +# define STM32_LTDC_L2_STRIDE (CONFIG_STM32_LTDC_L2_WIDTH) # elif STM32_LTDC_L2_BPP == 16 -# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32H7_LTDC_L2_WIDTH * 16 + 7) / 8) +# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32_LTDC_L2_WIDTH * 16 + 7) / 8) # elif STM32_LTDC_L2_BPP == 24 -# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32H7_LTDC_L2_WIDTH * 24 + 7) / 8) +# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32_LTDC_L2_WIDTH * 24 + 7) / 8) # elif STM32_LTDC_L2_BPP == 32 -# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32H7_LTDC_L2_WIDTH * 32 + 7) / 8) +# define STM32_LTDC_L2_STRIDE ((CONFIG_STM32_LTDC_L2_WIDTH * 32 + 7) / 8) # else # error Undefined or unrecognized base resolution # endif # define STM32_LTDC_L2_FBSIZE (STM32_LTDC_L2_STRIDE * \ - CONFIG_STM32H7_LTDC_L2_HEIGHT) + CONFIG_STM32_LTDC_L2_HEIGHT) #else # define STM32_LTDC_L2_FBSIZE (0) @@ -3097,7 +3097,7 @@ int stm32_ltdcinitialize(void) #endif /* Enable the backlight */ -#ifdef CONFIG_STM32H7_LCD_BACKLIGHT +#ifdef CONFIG_STM32_LTDC_BACKLIGHT stm32_backlight(true); #endif @@ -3183,7 +3183,7 @@ void stm32_ltdcuninitialize(void) * ****************************************************************************/ -#ifdef CONFIG_STM32H7_LCD_BACKLIGHT +#ifdef CONFIG_STM32_LTDC_BACKLIGHT void stm32_backlight(bool blon) { /* Set default backlight level CONFIG_STM32_LTDC_DEFBACKLIGHT */ diff --git a/arch/arm/src/stm32h7/stm32_ltdc.h b/arch/arm/src/stm32h7/stm32_ltdc.h index da7d21b7ed7..af4dc3d9ffb 100644 --- a/arch/arm/src/stm32h7/stm32_ltdc.h +++ b/arch/arm/src/stm32h7/stm32_ltdc.h @@ -91,12 +91,12 @@ struct fb_vtable_s *stm32_ltdcgetvplane(int vplane); * Name: stm32_lcd_backlight * * Description: - * If CONFIG_STM32_LCD_BACKLIGHT is defined, then the board-specific + * If CONFIG_STM32_LTDC_BACKLIGHT is defined, then the board-specific * logic must provide this interface to turn the backlight on and off. * ****************************************************************************/ -#ifdef CONFIG_STM32_LCD_BACKLIGHT +#ifdef CONFIG_STM32_LTDC_BACKLIGHT void stm32_backlight(bool blon); #endif #endif /* __ARCH_ARM_SRC_STM32F7_STM32_LTDC_H */ diff --git a/arch/arm/src/stm32h7/stm32_otgdev.c b/arch/arm/src/stm32h7/stm32_otgdev.c index ed564555d03..d185b987a03 100644 --- a/arch/arm/src/stm32h7/stm32_otgdev.c +++ b/arch/arm/src/stm32h7/stm32_otgdev.c @@ -5938,4 +5938,4 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) return OK; } -#endif /* CONFIG_USBDEV && CONFIG_STM32H7_OTGDEV */ +#endif /* CONFIG_USBDEV && CONFIG_STM32_OTGDEV */ diff --git a/arch/arm/src/stm32h7/stm32_otghost.c b/arch/arm/src/stm32h7/stm32_otghost.c index 1e34a411832..a192ab25ea6 100644 --- a/arch/arm/src/stm32h7/stm32_otghost.c +++ b/arch/arm/src/stm32h7/stm32_otghost.c @@ -76,7 +76,7 @@ # define GPIO_OTG_ID GPIO_OTGFS_ID # define GPIO_OTG_SOF GPIO_OTGFS_SOF # define STM32_OTG_FIFO_SIZE 4096 -#elif defined(CONFIG_STM32H7_OTGHS_HOST) +#elif defined(CONFIG_STM32_OTGHS_HOST) # error OTGHS HOST role not supported yet # define STM32_IRQ_OTG STM32_IRQ_OTGHS # define STM32_OTG_BASE STM32_OTGHS_BASE @@ -89,7 +89,7 @@ # error Not selected USBDEV peripheral #endif -#if defined(CONFIG_STM32_OTGFS_HOST) && defined(CONFIG_STM32H7_OTGHS_HOST) +#if defined(CONFIG_STM32_OTGFS_HOST) && defined(CONFIG_STM32_OTGHS_HOST) # error Only one HOST role supported #endif @@ -105,14 +105,14 @@ * * Options: * - * CONFIG_STM32H7_OTG_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + * CONFIG_STM32_OTG_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. * Default 128 (512 bytes) - * CONFIG_STM32H7_OTG_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + * CONFIG_STM32_OTG_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO * in 32-bit words. Default 96 (384 bytes) - * CONFIG_STM32H7_OTG_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + * CONFIG_STM32_OTG_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit * words. Default 96 (384 bytes) - * CONFIG_STM32H7_OTG_DESCSIZE - Maximum size of a descriptor. Default: 128 - * CONFIG_STM32H7_OTG_SOFINTR - Enable SOF interrupts. Why would you ever + * CONFIG_STM32_OTG_DESCSIZE - Maximum size of a descriptor. Default: 128 + * CONFIG_STM32_OTG_SOFINTR - Enable SOF interrupts. Why would you ever * want to do that? * CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access * debug. Depends on CONFIG_DEBUG_FEATURES. @@ -128,26 +128,26 @@ /* Default RxFIFO size */ -#ifndef CONFIG_STM32H7_OTG_RXFIFO_SIZE -# define CONFIG_STM32H7_OTG_RXFIFO_SIZE 128 +#ifndef CONFIG_STM32_OTG_RXFIFO_SIZE +# define CONFIG_STM32_OTG_RXFIFO_SIZE 128 #endif /* Default host non-periodic Tx FIFO size */ -#ifndef CONFIG_STM32H7_OTG_NPTXFIFO_SIZE -# define CONFIG_STM32H7_OTG_NPTXFIFO_SIZE 96 +#ifndef CONFIG_STM32_OTG_NPTXFIFO_SIZE +# define CONFIG_STM32_OTG_NPTXFIFO_SIZE 96 #endif /* Default host periodic Tx fifo size register */ -#ifndef CONFIG_STM32H7_OTG_PTXFIFO_SIZE -# define CONFIG_STM32H7_OTG_PTXFIFO_SIZE 96 +#ifndef CONFIG_STM32_OTG_PTXFIFO_SIZE +# define CONFIG_STM32_OTG_PTXFIFO_SIZE 96 #endif /* Maximum size of a descriptor */ -#ifndef CONFIG_STM32H7_OTG_DESCSIZE -# define CONFIG_STM32H7_OTG_DESCSIZE 128 +#ifndef CONFIG_STM32_OTG_DESCSIZE +# define CONFIG_STM32_OTG_DESCSIZE 128 #endif /* Register/packet debug depends on CONFIG_DEBUG_FEATURES */ @@ -407,7 +407,7 @@ static void stm32_gint_disconnected(struct stm32_usbhost_s *priv); /* Second level interrupt handlers */ -#ifdef CONFIG_STM32H7_OTG_SOFINTR +#ifdef CONFIG_STM32_OTG_SOFINTR static inline void stm32_gint_sofisr(struct stm32_usbhost_s *priv); #endif static inline void stm32_gint_rxflvlisr(struct stm32_usbhost_s *priv); @@ -3013,7 +3013,7 @@ static void stm32_gint_disconnected(struct stm32_usbhost_s *priv) * ****************************************************************************/ -#ifdef CONFIG_STM32H7_OTG_SOFINTR +#ifdef CONFIG_STM32_OTG_SOFINTR static inline void stm32_gint_sofisr(struct stm32_usbhost_s *priv) { /* Handle SOF interrupt */ @@ -3581,7 +3581,7 @@ static int stm32_gint_isr(int irq, void *context, void *arg) /* Handle the start of frame interrupt */ -#ifdef CONFIG_STM32H7_OTG_SOFINTR +#ifdef CONFIG_STM32_OTG_SOFINTR if ((pending & OTG_GINT_SOF) != 0) { usbhost_vtrace1(OTG_VTRACE1_GINT_SOF, 0); @@ -3747,7 +3747,7 @@ static inline void stm32_hostinit_enable(void) * OTG_GINT_DISC : Disconnect detected interrupt */ -#ifdef CONFIG_STM32H7_OTG_SOFINTR +#ifdef CONFIG_STM32_OTG_SOFINTR regval |= (OTG_GINT_SOF | OTG_GINT_RXFLVL | OTG_GINT_IISOOXFR | OTG_GINT_HPRT | OTG_GINT_HC | OTG_GINT_DISC); #else @@ -4274,7 +4274,7 @@ static int stm32_alloc(struct usbhost_driver_s *drvr, /* There is no special memory requirement for the STM32. */ - alloc = kmm_malloc(CONFIG_STM32H7_OTG_DESCSIZE); + alloc = kmm_malloc(CONFIG_STM32_OTG_DESCSIZE); if (!alloc) { return -ENOMEM; @@ -4283,7 +4283,7 @@ static int stm32_alloc(struct usbhost_driver_s *drvr, /* Return the allocated address and size of the descriptor buffer */ *buffer = alloc; - *maxlen = CONFIG_STM32H7_OTG_DESCSIZE; + *maxlen = CONFIG_STM32_OTG_DESCSIZE; return OK; } @@ -5150,21 +5150,21 @@ static void stm32_host_initialize(struct stm32_usbhost_s *priv) /* Configure Rx FIFO size (GRXFSIZ) */ - stm32_putreg(STM32_OTG_GRXFSIZ, CONFIG_STM32H7_OTG_RXFIFO_SIZE); - offset = CONFIG_STM32H7_OTG_RXFIFO_SIZE; + stm32_putreg(STM32_OTG_GRXFSIZ, CONFIG_STM32_OTG_RXFIFO_SIZE); + offset = CONFIG_STM32_OTG_RXFIFO_SIZE; /* Setup the host non-periodic Tx FIFO size (HNPTXFSIZ) */ regval = (offset | - (CONFIG_STM32H7_OTG_NPTXFIFO_SIZE << + (CONFIG_STM32_OTG_NPTXFIFO_SIZE << OTG_HNPTXFSIZ_NPTXFD_SHIFT)); stm32_putreg(STM32_OTG_HNPTXFSIZ, regval); - offset += CONFIG_STM32H7_OTG_NPTXFIFO_SIZE; + offset += CONFIG_STM32_OTG_NPTXFIFO_SIZE; /* Set up the host periodic Tx fifo size register (HPTXFSIZ) */ regval = (offset | - (CONFIG_STM32H7_OTG_PTXFIFO_SIZE << + (CONFIG_STM32_OTG_PTXFIFO_SIZE << OTG_HPTXFSIZ_PTXFD_SHIFT)); stm32_putreg(STM32_OTG_HPTXFSIZ, regval); diff --git a/arch/arm/src/stm32h7/stm32_pwm.c b/arch/arm/src/stm32h7/stm32_pwm.c index 1560a439a3e..95b095fc1ea 100644 --- a/arch/arm/src/stm32h7/stm32_pwm.c +++ b/arch/arm/src/stm32h7/stm32_pwm.c @@ -177,10 +177,10 @@ /* Break support */ -#if defined(CONFIG_STM32H7_TIM1_BREAK1) || defined(CONFIG_STM32H7_TIM1_BREAK2) || \ - defined(CONFIG_STM32H7_TIM8_BREAK1) || defined(CONFIG_STM32H7_TIM8_BREAK2) || \ - defined(CONFIG_STM32H7_TIM15_BREAK1) || defined(CONFIG_STM32H7_TIM16_BREAK1) || \ - defined(CONFIG_STM32H7_TIM17_BREAK1) +#if defined(CONFIG_STM32_TIM1_BREAK1) || defined(CONFIG_STM32_TIM1_BREAK2) || \ + defined(CONFIG_STM32_TIM8_BREAK1) || defined(CONFIG_STM32_TIM8_BREAK2) || \ + defined(CONFIG_STM32_TIM15_BREAK1) || defined(CONFIG_STM32_TIM16_BREAK1) || \ + defined(CONFIG_STM32_TIM17_BREAK1) # defined HAVE_BREAK #endif @@ -392,14 +392,14 @@ static struct stm32_pwmchan_s g_pwm1channels[] = #ifdef HAVE_BREAK .brk = { -#ifdef CONFIG_STM32H7_TIM1_BREAK1 +#ifdef CONFIG_STM32_TIM1_BREAK1 .en1 = 1, - .pol1 = CONFIG_STM32H7_TIM1_BRK1POL, + .pol1 = CONFIG_STM32_TIM1_BRK1POL, #endif -#ifdef CONFIG_STM32H7_TIM1_BREAK2 +#ifdef CONFIG_STM32_TIM1_BREAK2 .en2 = 1, - .pol2 = CONFIG_STM32H7_TIM1_BRK2POL, - .flt2 = CONFIG_STM32H7_TIM1_BRK2FLT, + .pol2 = CONFIG_STM32_TIM1_BRK2POL, + .flt2 = CONFIG_STM32_TIM1_BRK2FLT, #endif }, #endif @@ -937,14 +937,14 @@ static struct stm32_pwmchan_s g_pwm8channels[] = #ifdef HAVE_BREAK .brk = { -#ifdef CONFIG_STM32H7_TIM8_BREAK1 +#ifdef CONFIG_STM32_TIM8_BREAK1 .en1 = 1, - .pol1 = CONFIG_STM32H7_TIM8_BRK1POL, + .pol1 = CONFIG_STM32_TIM8_BRK1POL, #endif -#ifdef CONFIG_STM32H7_TIM8_BREAK2 +#ifdef CONFIG_STM32_TIM8_BREAK2 .en2 = 1, - .pol2 = CONFIG_STM32H7_TIM8_BRK2POL, - .flt2 = CONFIG_STM32H7_TIM8_BRK2FLT, + .pol2 = CONFIG_STM32_TIM8_BRK2POL, + .flt2 = CONFIG_STM32_TIM8_BRK2FLT, #endif }, #endif @@ -1260,9 +1260,9 @@ static struct stm32_pwmchan_s g_pwm15channels[] = #ifdef HAVE_BREAK .brk = { -#ifdef CONFIG_STM32H7_TIM15_BREAK1 +#ifdef CONFIG_STM32_TIM15_BREAK1 .en1 = 1, - .pol1 = CONFIG_STM32H7_TIM15_BRK1POL, + .pol1 = CONFIG_STM32_TIM15_BRK1POL, #endif /* No BREAK2 */ }, @@ -1342,9 +1342,9 @@ static struct stm32_pwmchan_s g_pwm16channels[] = #ifdef HAVE_BREAK .brk = { -#ifdef CONFIG_STM32H7_TIM16_BREAK1 +#ifdef CONFIG_STM32_TIM16_BREAK1 .en1 = 1, - .pol1 = CONFIG_STM32H7_TIM16_BRK1POL, + .pol1 = CONFIG_STM32_TIM16_BRK1POL, #endif /* No BREAK2 */ }, @@ -1362,8 +1362,8 @@ static struct stm32_pwmchan_s g_pwm16channels[] = .out2 = { .in_use = 1, - .pol = CONFIG_STM32H7_TIM16_CH1NPOL, - .idle = CONFIG_STM32H7_TIM16_CH1NIDLE, + .pol = CONFIG_STM32_TIM16_CH1NPOL, + .idle = CONFIG_STM32_TIM16_CH1NIDLE, .pincfg = PWM_TIM16_CH2CFG, } #endif @@ -1408,9 +1408,9 @@ static struct stm32_pwmchan_s g_pwm17channels[] = #ifdef HAVE_BREAK .brk = { -#ifdef CONFIG_STM32H7_TIM17_BREAK1 +#ifdef CONFIG_STM32_TIM17_BREAK1 .en1 = 1, - .pol1 = CONFIG_STM32H7_TIM17_BRK1POL, + .pol1 = CONFIG_STM32_TIM17_BRK1POL, #endif /* No BREAK2 */ }, @@ -1428,8 +1428,8 @@ static struct stm32_pwmchan_s g_pwm17channels[] = .out2 = { .in_use = 1, - .pol = CONFIG_STM32H7_TIM17_CH1NPOL, - .idle = CONFIG_STM32H7_TIM17_CH1NIDLE, + .pol = CONFIG_STM32_TIM17_CH1NPOL, + .idle = CONFIG_STM32_TIM17_CH1NIDLE, .pincfg = PWM_TIM17_CH2CFG, } #endif diff --git a/arch/arm/src/stm32h7/stm32_pwm.h b/arch/arm/src/stm32h7/stm32_pwm.h index 8cb724fca02..de9b791109a 100644 --- a/arch/arm/src/stm32h7/stm32_pwm.h +++ b/arch/arm/src/stm32h7/stm32_pwm.h @@ -52,7 +52,7 @@ /* Timer devices may be used for different purposes. One special purpose is * to generate modulated outputs for such things as motor control. - * If CONFIG_STM32H7_TIMn is defined then the CONFIG_STM32H7_TIMn_PWM must + * If CONFIG_STM32_TIMn is defined then the CONFIG_STM32_TIMn_PWM must * also be defined to indicate that timer "n" is intended to be used for * pulsed output signal generation. */ @@ -98,8 +98,8 @@ * pulses */ -#undef CONFIG_STM32H7_TIM6_PWM -#undef CONFIG_STM32H7_TIM7_PWM +#undef CONFIG_STM32_TIM6_PWM +#undef CONFIG_STM32_TIM7_PWM /* Check if PWM support for any channel is enabled. */ @@ -326,7 +326,7 @@ /* For each timer that is enabled for PWM usage, we need the following * additional configuration settings: * - * CONFIG_STM32H7_TIMx_CHANNEL - Specifies the timer output channel + * CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel * {1,..,4} * PWM_TIMx_CHn - One of the values defined in chip/stm32*_pinmap.h. * In the case where there are multiple pin selections, the correct diff --git a/arch/arm/src/stm32h7/stm32_qencoder.h b/arch/arm/src/stm32h7/stm32_qencoder.h index 0af33dc2c71..6ad6f0f392e 100644 --- a/arch/arm/src/stm32h7/stm32_qencoder.h +++ b/arch/arm/src/stm32h7/stm32_qencoder.h @@ -38,8 +38,8 @@ ****************************************************************************/ /* Timer devices may be used for different purposes. One special purpose is - * as a quadrature encoder input device. If CONFIG_STM32H7_TIMn is defined - * then the CONFIG_STM32H7_TIMn_QE must also be defined to indicate that + * as a quadrature encoder input device. If CONFIG_STM32_TIMn is defined + * then the CONFIG_STM32_TIMn_QE must also be defined to indicate that * timer "n" is intended to be used for as a quadrature encoder. */ @@ -66,14 +66,14 @@ * (at least for the STM32 H7) */ -#undef CONFIG_STM32H7_TIM6_QE -#undef CONFIG_STM32H7_TIM7_QE -#undef CONFIG_STM32H7_TIM9_QE -#undef CONFIG_STM32H7_TIM10_QE -#undef CONFIG_STM32H7_TIM11_QE -#undef CONFIG_STM32H7_TIM12_QE -#undef CONFIG_STM32H7_TIM13_QE -#undef CONFIG_STM32H7_TIM14_QE +#undef CONFIG_STM32_TIM6_QE +#undef CONFIG_STM32_TIM7_QE +#undef CONFIG_STM32_TIM9_QE +#undef CONFIG_STM32_TIM10_QE +#undef CONFIG_STM32_TIM11_QE +#undef CONFIG_STM32_TIM12_QE +#undef CONFIG_STM32_TIM13_QE +#undef CONFIG_STM32_TIM14_QE /**************************************************************************** * Included Files diff --git a/arch/arm/src/stm32h7/stm32_tim.c b/arch/arm/src/stm32h7/stm32_tim.c index e43019938ec..f8a1f374c70 100644 --- a/arch/arm/src/stm32h7/stm32_tim.c +++ b/arch/arm/src/stm32h7/stm32_tim.c @@ -53,20 +53,20 @@ * include: * * - To generate modulated outputs for such things as motor control. If - * CONFIG_STM32H7_TIMn is defined then the CONFIG_STM32H7_TIMn_PWM may + * CONFIG_STM32_TIMn is defined then the CONFIG_STM32_TIMn_PWM may * also be defined to indicate that the timer is intended to be used for * pulsed output modulation. * - * - To control periodic ADC input sampling. If CONFIG_STM32H7_TIMn is - * defined then CONFIG_STM32H7_TIMn_ADC may also be defined to indicate + * - To control periodic ADC input sampling. If CONFIG_STM32_TIMn is + * defined then CONFIG_STM32_TIMn_ADC may also be defined to indicate * that timer "n" is intended to be used for that purpose. * - * - To control periodic DAC outputs. If CONFIG_STM32H7_TIMn is defined - * then CONFIG_STM32H7_TIMn_DAC may also be defined to indicate that + * - To control periodic DAC outputs. If CONFIG_STM32_TIMn is defined + * then CONFIG_STM32_TIMn_DAC may also be defined to indicate that * timer "n" is intended to be used for that purpose. * - * - To use a Quadrature Encoder. If CONFIG_STM32H7_TIMn is defined then - * CONFIG_STM32H7_TIMn_QE may also be defined to indicate that timer "n" + * - To use a Quadrature Encoder. If CONFIG_STM32_TIMn is defined then + * CONFIG_STM32_TIMn_QE may also be defined to indicate that timer "n" * is intended to be used for that purpose. * * In any of these cases, the timer will not be used by this timer module. @@ -97,13 +97,13 @@ # undef CONFIG_STM32_TIM5 #endif -#if defined(CONFIG_STM32H7_TIM6_PWM) || defined (CONFIG_STM32_TIM6_ADC) || \ - defined(CONFIG_STM32_TIM6_DAC) || defined(CONFIG_STM32H7_TIM6_QE) +#if defined(CONFIG_STM32_TIM6_PWM) || defined (CONFIG_STM32_TIM6_ADC) || \ + defined(CONFIG_STM32_TIM6_DAC) || defined(CONFIG_STM32_TIM6_QE) # undef CONFIG_STM32_TIM6 #endif -#if defined(CONFIG_STM32H7_TIM7_PWM) || defined (CONFIG_STM32H7_TIM7_ADC) || \ - defined(CONFIG_STM32_TIM7_DAC) || defined(CONFIG_STM32H7_TIM7_QE) +#if defined(CONFIG_STM32_TIM7_PWM) || defined (CONFIG_STM32_TIM7_ADC) || \ + defined(CONFIG_STM32_TIM7_DAC) || defined(CONFIG_STM32_TIM7_QE) # undef CONFIG_STM32_TIM7 #endif @@ -112,33 +112,33 @@ # undef CONFIG_STM32_TIM8 #endif -#if defined(CONFIG_STM32_TIM12_PWM) || defined (CONFIG_STM32H7_TIM12_ADC) || \ - defined(CONFIG_STM32_TIM12_DAC) || defined(CONFIG_STM32H7_TIM12_QE) +#if defined(CONFIG_STM32_TIM12_PWM) || defined (CONFIG_STM32_TIM12_ADC) || \ + defined(CONFIG_STM32_TIM12_DAC) || defined(CONFIG_STM32_TIM12_QE) # undef CONFIG_STM32_TIM12 #endif -#if defined(CONFIG_STM32_TIM13_PWM) || defined (CONFIG_STM32H7_TIM13_ADC) || \ - defined(CONFIG_STM32_TIM13_DAC) || defined(CONFIG_STM32H7_TIM13_QE) +#if defined(CONFIG_STM32_TIM13_PWM) || defined (CONFIG_STM32_TIM13_ADC) || \ + defined(CONFIG_STM32_TIM13_DAC) || defined(CONFIG_STM32_TIM13_QE) # undef CONFIG_STM32_TIM13 #endif -#if defined(CONFIG_STM32_TIM14_PWM) || defined (CONFIG_STM32H7_TIM14_ADC) || \ - defined(CONFIG_STM32_TIM14_DAC) || defined(CONFIG_STM32H7_TIM14_QE) +#if defined(CONFIG_STM32_TIM14_PWM) || defined (CONFIG_STM32_TIM14_ADC) || \ + defined(CONFIG_STM32_TIM14_DAC) || defined(CONFIG_STM32_TIM14_QE) # undef CONFIG_STM32_TIM14 #endif #if defined(CONFIG_STM32_TIM15_PWM) || defined (CONFIG_STM32_TIM15_ADC) || \ - defined(CONFIG_STM32H7_TIM15_DAC) || defined(CONFIG_STM32H7_TIM15_QE) + defined(CONFIG_STM32_TIM15_DAC) || defined(CONFIG_STM32_TIM15_QE) # undef CONFIG_STM32_TIM15 #endif -#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32H7_TIM16_ADC) || \ - defined(CONFIG_STM32H7_TIM16_DAC) || defined(CONFIG_STM32H7_TIM16_QE) +#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32_TIM16_ADC) || \ + defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE) # undef CONFIG_STM32_TIM16 #endif -#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32H7_TIM17_ADC) || \ - defined(CONFIG_STM32H7_TIM17_DAC) || defined(CONFIG_STM32H7_TIM17_QE) +#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32_TIM17_ADC) || \ + defined(CONFIG_STM32_TIM17_DAC) || defined(CONFIG_STM32_TIM17_QE) # undef CONFIG_STM32_TIM17 #endif diff --git a/arch/arm/src/stm32h7/stm32_usbhost.h b/arch/arm/src/stm32h7/stm32_usbhost.h index 798b0aaf965..065e980ffcb 100644 --- a/arch/arm/src/stm32h7/stm32_usbhost.h +++ b/arch/arm/src/stm32h7/stm32_usbhost.h @@ -35,13 +35,13 @@ * * Options: * - * CONFIG_STM32H7_OTG_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + * CONFIG_STM32_OTG_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. * Default 128 (512 bytes) - * CONFIG_STM32H7_OTG_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + * CONFIG_STM32_OTG_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO * in 32-bit words. Default 96 (384 bytes) - * CONFIG_STM32H7_OTG_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + * CONFIG_STM32_OTG_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit * words. Default 96 (384 bytes) - * CONFIG_STM32H7_OTG_SOFINTR - Enable SOF interrupts. Why would you ever + * CONFIG_STM32_OTG_SOFINTR - Enable SOF interrupts. Why would you ever * want to do that? * * CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access diff --git a/arch/arm/src/stm32h7/stm32_wwdg.c b/arch/arm/src/stm32h7/stm32_wwdg.c index d0a35e6ca73..c4dbcbf8806 100644 --- a/arch/arm/src/stm32h7/stm32_wwdg.c +++ b/arch/arm/src/stm32h7/stm32_wwdg.c @@ -66,12 +66,12 @@ /* Configuration ************************************************************/ -#ifndef CONFIG_STM32H7_WWDG_DEFTIMOUT -# define CONFIG_STM32H7_WWDG_DEFTIMOUT WWDG_MAXTIMEOUT +#ifndef CONFIG_STM32_WWDG_DEFTIMOUT +# define CONFIG_STM32_WWDG_DEFTIMOUT WWDG_MAXTIMEOUT #endif #ifndef CONFIG_DEBUG_WATCHDOG_INFO -# undef CONFIG_STM32H7_WWDG_REGDEBUG +# undef CONFIG_STM32_WWDG_REGDEBUG #endif /**************************************************************************** @@ -100,7 +100,7 @@ struct stm32_lowerhalf_s /* Register operations ******************************************************/ -#ifdef CONFIG_STM32H7_WWDG_REGDEBUG +#ifdef CONFIG_STM32_WWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr); static void stm32_putreg(uint16_t val, uint32_t addr); #else @@ -161,7 +161,7 @@ static struct stm32_lowerhalf_s g_wdgdev; * ****************************************************************************/ -#ifdef CONFIG_STM32H7_WWDG_REGDEBUG +#ifdef CONFIG_STM32_WWDG_REGDEBUG static uint16_t stm32_getreg(uint32_t addr) { static uint32_t prevaddr = 0; @@ -224,7 +224,7 @@ static uint16_t stm32_getreg(uint32_t addr) * ****************************************************************************/ -#ifdef CONFIG_STM32H7_WWDG_REGDEBUG +#ifdef CONFIG_STM32_WWDG_REGDEBUG static void stm32_putreg(uint16_t val, uint32_t addr) { /* Show the register value being written */ @@ -772,7 +772,7 @@ void stm32_wwdginitialize(const char *devpath) */ stm32_settimeout((struct watchdog_lowerhalf_s *)priv, - CONFIG_STM32H7_WWDG_DEFTIMOUT); + CONFIG_STM32_WWDG_DEFTIMOUT); /* Register the watchdog driver as /dev/watchdog0 */ diff --git a/arch/arm/src/stm32h7/stm32h743xx_flash.c b/arch/arm/src/stm32h7/stm32h743xx_flash.c index 9e996ee83f3..292fa63d5da 100644 --- a/arch/arm/src/stm32h7/stm32h743xx_flash.c +++ b/arch/arm/src/stm32h7/stm32h743xx_flash.c @@ -70,9 +70,9 @@ /* Flash size is known from the chip selection: * * When CONFIG_STM32_FLASH_OVERRIDE_DEFAULT is set the - * CONFIG_STM32H7_FLASH_CONFIG_x selects the default FLASH size based on + * CONFIG_STM32_FLASH_CONFIG_x selects the default FLASH size based on * the chip part number. This value can be overridden with - * CONFIG_STM32H7_FLASH_OVERRIDE_x + * CONFIG_STM32_FLASH_OVERRIDE_x * * Parts STM32H74xxE have 512Kb of FLASH * Parts STM32H74xxG have 1024Kb of FLASH diff --git a/arch/arm/src/stm32h7/stm32h7b3xx_flash.c b/arch/arm/src/stm32h7/stm32h7b3xx_flash.c index 7e1f8eb7d64..2a3756d9f53 100644 --- a/arch/arm/src/stm32h7/stm32h7b3xx_flash.c +++ b/arch/arm/src/stm32h7/stm32h7b3xx_flash.c @@ -70,9 +70,9 @@ /* Flash size is known from the chip selection: * * When CONFIG_STM32_FLASH_OVERRIDE_DEFAULT is set the - * CONFIG_STM32H7_FLASH_CONFIG_x selects the default FLASH size based on + * CONFIG_STM32_FLASH_CONFIG_x selects the default FLASH size based on * the chip part number. This value can be overridden with - * CONFIG_STM32H7_FLASH_OVERRIDE_x + * CONFIG_STM32_FLASH_OVERRIDE_x * * Parts STM32H7x3xG have 1024Kb of FLASH * Parts STM32H7x3xI have 2048Kb of FLASH diff --git a/boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt b/boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt index 2ddfc166fbd..3b2485af7d9 100644 --- a/boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt +++ b/boards/arm/stm32h7/devebox-stm32h743/src/CMakeLists.txt @@ -32,7 +32,7 @@ if(CONFIG_ARCH_BUTTONS) list(APPEND SRCS stm32_buttons.c) endif() -if(CONFIG_STM32H7_SDMMC) +if(CONFIG_STM32_SDMMC) list(APPEND SRCS stm32_sdmmc.c) endif() diff --git a/boards/arm/stm32h7/nucleo-h723zg/src/stm32_boot.c b/boards/arm/stm32h7/nucleo-h723zg/src/stm32_boot.c index 8caa51be221..ffddcc7d01a 100644 --- a/boards/arm/stm32h7/nucleo-h723zg/src/stm32_boot.c +++ b/boards/arm/stm32h7/nucleo-h723zg/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot.c b/boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot.c index 70d9ebd007e..48da9194419 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot.c +++ b/boards/arm/stm32h7/nucleo-h743zi/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_boot.c b/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_boot.c index 36ad112abab..29d8de24ef8 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_boot.c +++ b/boards/arm/stm32h7/nucleo-h743zi2/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/nucleo-h745zi/src/stm32_boot.c b/boards/arm/stm32h7/nucleo-h745zi/src/stm32_boot.c index 4e56b563eee..265a4399fef 100644 --- a/boards/arm/stm32h7/nucleo-h745zi/src/stm32_boot.c +++ b/boards/arm/stm32h7/nucleo-h745zi/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/nucleo-h753zi/src/stm32_boot.c b/boards/arm/stm32h7/nucleo-h753zi/src/stm32_boot.c index d24de71d2ea..417ba5b8bcd 100644 --- a/boards/arm/stm32h7/nucleo-h753zi/src/stm32_boot.c +++ b/boards/arm/stm32h7/nucleo-h753zi/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/openh743i/src/stm32_boot.c b/boards/arm/stm32h7/openh743i/src/stm32_boot.c index 77c613755ab..a6193210ada 100644 --- a/boards/arm/stm32h7/openh743i/src/stm32_boot.c +++ b/boards/arm/stm32h7/openh743i/src/stm32_boot.c @@ -52,7 +52,7 @@ void stm32_boardinitialize(void) { -#if defined(CONFIG_STM32_OTGFS_HOST) || defined(CONFIG_STM32H7_OTGHS_HOST) +#if defined(CONFIG_STM32_OTGFS_HOST) || defined(CONFIG_STM32_OTGHS_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/stm32h745i-disco/src/stm32_boot.c b/boards/arm/stm32h7/stm32h745i-disco/src/stm32_boot.c index 24c252bc0cc..786f655db53 100644 --- a/boards/arm/stm32h7/stm32h745i-disco/src/stm32_boot.c +++ b/boards/arm/stm32h7/stm32h745i-disco/src/stm32_boot.c @@ -56,7 +56,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c b/boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c index b994aaeeab1..2fe6598915c 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c +++ b/boards/arm/stm32h7/stm32h747i-disco/src/stm32_boot.c @@ -58,7 +58,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGHS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGHS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize(); diff --git a/boards/arm/stm32h7/stm32h750b-dk/src/stm32_boot.c b/boards/arm/stm32h7/stm32h750b-dk/src/stm32_boot.c index 414344c964a..e0fe3d73175 100644 --- a/boards/arm/stm32h7/stm32h750b-dk/src/stm32_boot.c +++ b/boards/arm/stm32h7/stm32h750b-dk/src/stm32_boot.c @@ -54,7 +54,7 @@ void stm32_boardinitialize(void) board_autoled_initialize(); #endif -#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32H7_HOST) +#if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_HOST) /* Initialize USB */ stm32_usbinitialize();
