"Mark A. Greer" <mgr...@mvista.com> writes:
> From: Mark A. Greer <mgr...@mvista.com>
>
> The watchdog code currently hardcodes the base address
> of the timer its using. To support new SoCs, make it
> support timers at any address. Use davinci_soc_info
> to do this.
>
> Signed-off-by: Mark A. Greer <mgr...@mvista.com>
You should also update the WDT setup from devices.c. This is where
it sets up the actual watchdog driver.
Now that it's in soc_info, it could be done in common.c instead of devices.c.
Kevin
> ---
> arch/arm/mach-davinci/dm355.c | 1 +
> arch/arm/mach-davinci/dm644x.c | 1 +
> arch/arm/mach-davinci/dm646x.c | 1 +
> arch/arm/mach-davinci/include/mach/common.h | 1 +
> arch/arm/mach-davinci/include/mach/time.h | 1 +
> arch/arm/mach-davinci/time.c | 4 +---
> 6 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
> index 837570b..68e2320 100644
> --- a/arch/arm/mach-davinci/dm355.c
> +++ b/arch/arm/mach-davinci/dm355.c
> @@ -649,6 +649,7 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
> .intc_type = DAVINCI_INTC_TYPE_AINTC,
> .intc_num = DAVINCI_N_AINTC_IRQ,
> .timer_info = &dm355_timer_info,
> + .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE),
> };
>
> struct davinci_soc_info *dm355_get_soc_info(void)
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 5d63d46..3d3b05c 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -592,6 +592,7 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
> .intc_type = DAVINCI_INTC_TYPE_AINTC,
> .intc_num = DAVINCI_N_AINTC_IRQ,
> .timer_info = &dm644x_timer_info,
> + .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE),
> };
>
> struct davinci_soc_info *dm644x_get_soc_info(void)
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index 96ae370..5f49b30 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -571,6 +571,7 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
> .intc_type = DAVINCI_INTC_TYPE_AINTC,
> .intc_num = DAVINCI_N_AINTC_IRQ,
> .timer_info = &dm646x_timer_info,
> + .wdt_base = IO_ADDRESS(DAVINCI_WDOG_BASE),
> };
>
> struct davinci_soc_info *dm646x_get_soc_info(void)
> diff --git a/arch/arm/mach-davinci/include/mach/common.h
> b/arch/arm/mach-davinci/include/mach/common.h
> index 664655b..9a232b5 100644
> --- a/arch/arm/mach-davinci/include/mach/common.h
> +++ b/arch/arm/mach-davinci/include/mach/common.h
> @@ -54,6 +54,7 @@ struct davinci_soc_info {
> int intc_type;
> unsigned long intc_num;
> struct davinci_timer_info *timer_info;
> + void __iomem *wdt_base;
> };
>
> extern struct davinci_soc_info *davinci_soc_info;
> diff --git a/arch/arm/mach-davinci/include/mach/time.h
> b/arch/arm/mach-davinci/include/mach/time.h
> index 260d276..16cc89f 100644
> --- a/arch/arm/mach-davinci/include/mach/time.h
> +++ b/arch/arm/mach-davinci/include/mach/time.h
> @@ -13,6 +13,7 @@
>
> #define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
> #define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
> +#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
>
> enum {
> T0_BOT,
> diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
> index ab456e5..f07bac8 100644
> --- a/arch/arm/mach-davinci/time.c
> +++ b/arch/arm/mach-davinci/time.c
> @@ -34,8 +34,6 @@
> static struct clock_event_device clockevent_davinci;
> static unsigned int davinci_clock_tick_rate;
>
> -#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
> -
> /*
> * This driver configures the 2 64-bit count-up timers as 4 independent
> * 32-bit count-up timers used as follows:
> @@ -341,7 +339,7 @@ struct sys_timer davinci_timer = {
> /* reset board using watchdog timer */
> void davinci_watchdog_reset(void) {
> u32 tgcr, wdtcr;
> - void __iomem *base = IO_ADDRESS(DAVINCI_WDOG_BASE);
> + void __iomem *base = davinci_soc_info->wdt_base;
> struct device dev;
> struct clk *wd_clk;
>
> --
> 1.6.0.3
>
>
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