On 9/24/19 1:34 PM, Laszlo Ersek wrote: > Before adding another SMM-related, and therefore Q35-only, dynamically > detectable feature, extract the current board type check from > Q35TsegMbytesInitialization() to a standalone function. > > Cc: Ard Biesheuvel <[email protected]> > Cc: Boris Ostrovsky <[email protected]> > Cc: Brijesh Singh <[email protected]> > Cc: Igor Mammedov <[email protected]> > Cc: Jiewen Yao <[email protected]> > Cc: Joao M Martins <[email protected]> > Cc: Jordan Justen <[email protected]> > Cc: Jun Nakajima <[email protected]> > Cc: Michael Kinney <[email protected]> > Cc: Paolo Bonzini <[email protected]> > Cc: Phillip Goerl <[email protected]> > Cc: Yingwen Chen <[email protected]> > Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512 > Signed-off-by: Laszlo Ersek <[email protected]> > --- > OvmfPkg/PlatformPei/MemDetect.c | 13 +---------- > OvmfPkg/PlatformPei/Platform.c | 23 ++++++++++++++++++++ > 2 files changed, 24 insertions(+), 12 deletions(-) > > diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c > index d451989f31c9..58b171fba1c8 100644 > --- a/OvmfPkg/PlatformPei/MemDetect.c > +++ b/OvmfPkg/PlatformPei/MemDetect.c > @@ -53,18 +53,7 @@ Q35TsegMbytesInitialization ( > UINT16 ExtendedTsegMbytes; > RETURN_STATUS PcdStatus; > > - if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) { > - DEBUG (( > - DEBUG_ERROR, > - "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; " > - "only DID=0x%04x (Q35) is supported\n", > - __FUNCTION__, > - mHostBridgeDevId, > - INTEL_Q35_MCH_DEVICE_ID > - )); > - ASSERT (FALSE); > - CpuDeadLoop (); > - } > + ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID); > > // > // Check if QEMU offers an extended TSEG. > diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c > index 3ba2459872d9..ca6d37cb1549 100644 > --- a/OvmfPkg/PlatformPei/Platform.c > +++ b/OvmfPkg/PlatformPei/Platform.c > @@ -563,6 +563,28 @@ S3Verification ( > } > > > +VOID > +Q35BoardVerification ( > + VOID > + ) > +{ > + if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) { > + return; > + } > + > + DEBUG (( > + DEBUG_ERROR, > + "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; " > + "only DID=0x%04x (Q35) is supported\n", > + __FUNCTION__, > + mHostBridgeDevId, > + INTEL_Q35_MCH_DEVICE_ID > + )); > + ASSERT (FALSE); > + CpuDeadLoop (); > +} > + > + > /** > Fetch the number of boot CPUs from QEMU and expose it to UefiCpuPkg > modules. > Set the mMaxCpuCount variable. > @@ -646,6 +668,7 @@ InitializePlatform ( > mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID); > > if (FeaturePcdGet (PcdSmmSmramRequire)) { > + Q35BoardVerification (); > Q35TsegMbytesInitialization (); > } > >
Reviewed-by: Philippe Mathieu-Daude <[email protected]> -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47935): https://edk2.groups.io/g/devel/message/47935 Mute This Topic: https://groups.io/mt/34274939/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
