Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
Thanks, Chasel > -----Original Message----- > From: mikub...@linux.microsoft.com <mikub...@linux.microsoft.com> > Sent: Tuesday, September 6, 2022 8:19 PM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.c...@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desim...@intel.com>; Zeng, Star <star.z...@intel.com> > Subject: [PATCH v1 4/7] IntelFsp2WrapperPkg: Fix code formatting errors > > From: Michael Kubacki <michael.kuba...@microsoft.com> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 > > This package did not have CI enabled so code changes were merged that fail > uncrustify formatting. This change updates those files to include uncustify > formatting. > > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Cc: Star Zeng <star.z...@intel.com> > Signed-off-by: Michael Kubacki <michael.kuba...@microsoft.com> > --- > IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c > | 4 ++++ > IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c > | 1 - > > IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit > Data.c | 8 ++++---- > 3 files changed, 8 insertions(+), 5 deletions(-) > > diff --git > a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c > b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c > index 5b5beb5c6557..2e82a0c1b59a 100644 > --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c > +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib. > +++ c > @@ -115,6 +115,7 @@ CallFspNotifyPhase ( > } else { > Status = Execute64BitCode ((UINTN)NotifyPhaseApi, > (UINTN)NotifyPhaseParams, (UINTN)NULL); > } > + > SetInterruptState (InterruptState); > > return Status; > @@ -152,6 +153,7 @@ CallFspMemoryInit ( > } else { > Status = Execute64BitCode ((UINTN)FspMemoryInitApi, > (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr); > } > + > SetInterruptState (InterruptState); > > return Status; > @@ -187,6 +189,7 @@ CallTempRamExit ( > } else { > Status = Execute64BitCode ((UINTN)TempRamExitApi, > (UINTN)TempRamExitParam, (UINTN)NULL); > } > + > SetInterruptState (InterruptState); > > return Status; > @@ -222,6 +225,7 @@ CallFspSiliconInit ( > } else { > Status = Execute64BitCode ((UINTN)FspSiliconInitApi, > (UINTN)FspsUpdDataPtr, (UINTN)NULL); > } > + > SetInterruptState (InterruptState); > > return Status; > diff --git > a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c > b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c > index a17ca7dcabe8..c8248eb88851 100644 > --- > a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c > +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExec > +++ ute.c > @@ -69,4 +69,3 @@ Execute64BitCode ( > { > return EFI_UNSUPPORTED; > } > - > diff --git > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > index d2acb2fd46cd..fb0d9a8683a9 100644 > --- > a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamI > nitData.c > +++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecR > +++ amInitData.c > @@ -10,10 +10,10 @@ > #include <FspEas.h> > > typedef struct { > - EFI_PHYSICAL_ADDRESS MicrocodeRegionBase; > - UINT64 MicrocodeRegionSize; > - EFI_PHYSICAL_ADDRESS CodeRegionBase; > - UINT64 CodeRegionSize; > + EFI_PHYSICAL_ADDRESS MicrocodeRegionBase; > + UINT64 MicrocodeRegionSize; > + EFI_PHYSICAL_ADDRESS CodeRegionBase; > + UINT64 CodeRegionSize; > } FSPT_CORE_UPD; > > typedef struct { > -- > 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#93324): https://edk2.groups.io/g/devel/message/93324 Mute This Topic: https://groups.io/mt/93518039/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-