Define the BIT 1 as the override bit for Sstc extension. This will be used by the timer driver to decide whether to use SBI calls or direct CSR access to configure the timer.
Cc: Liming Gao <[email protected]> Cc: Michael D Kinney <[email protected]> Cc: Zhiguang Liu <[email protected]> Cc: Andrei Warkentin <[email protected]> Signed-off-by: Sunil V L <[email protected]> --- MdePkg/MdePkg.dec | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 2ee112cc087a..0459418906f8 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -2405,6 +2405,8 @@ [PcdsFixedAtBuild.RISCV64, PcdsPatchableInModule.RISCV64] # Configurability to override RISC-V CPU Features # BIT 0 = Cache Management Operations. This bit is relevant only if # previous stage has feature enabled and user wants to disable it. + # BIT 1 = Supervisor Time Compare (Sstc). This bit is relevant only if + # previous stage has feature enabled and user wants to disable it. # gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFFFFFFFFFF|UINT64|0x69 -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113093): https://edk2.groups.io/g/devel/message/113093 Mute This Topic: https://groups.io/mt/103501838/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
