On Wed, Jan 3, 2024 at 1:59 PM Sunil V L <suni...@ventanamicro.com> wrote: > > This series adds the support for RISV-V Sstc extension in EDK2 timer
nit: RISC-V > implementation. Sstc extension allows S-mode software to program the > timer directly without using SBI calls. > > Currently, PCD variable is used to detect whether feature is enabled. By > default the feature is enabled and platforms need to set the PCD to > disable the feature if Sstc is not supported. > > For RiscVVirtQemu, it is disabled by default (until extension discovery > feature is enabled). I'm curious, what do you want Sstc for? Is the performance difference measurable (if so, please post numbers, and add them to the commit)? Does it have any other advantages? -- Pedro -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#113315): https://edk2.groups.io/g/devel/message/113315 Mute This Topic: https://groups.io/mt/103501836/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
