On 03/02/2021 14:50, Robin Müller wrote:
The following link contains more theoretical information about why
these sections were placed at these addresses:
https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices
<https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices>
Kind Regards
Robin
On Wed, 3 Feb 2021 at 14:44, Robin Müller <robin.muelle...@gmail.com
<mailto:robin.muelle...@gmail.com>> wrote:
The DMA descriptors need to be placed at the start of the SRAM3
and need to be aligned in a certain way. The RX buffer will take
up the first (slightly less than) 16 kB of SRAM3 but needs to be
placed
behind the DMA descriptors. It also needs to be placed in a way
that the MPU configuration required for the DMA descriptors will
not do something with the RX buffers.
In the example provided by STM32, the first 256 bytes are
configured by MPU Config.
I had a look at the FAQ and the manual. Currently, we use the SRAM1 for
the .nocache area. This is in the D2 domain. The Ethernet module is in
the D2 domain. I am not sure why you have to change this to the smaller
SRAM3? The libbsd driver works well with the current setting.
--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax: +49-89-18 94 741 - 08
Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
_______________________________________________
devel mailing list
devel@rtems.org
http://lists.rtems.org/mailman/listinfo/devel
