How would you define a generic linker section? I tried to put the following section into the linkcmdsmemory file like you suggested (at spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml):
SECTIONS { .stm32h7_sram_3 (NOLOAD) : ALIGN_WITH_INPUT { bsp_stm32h7_sram_3_start = stm32h7_memory_sram_3_begin; bsp_stm32h7_sram_3_end = stm32h7_memory_sram_3_end; } > SRAM_3 AT > FLASH } But the waf build fails with a syntax error: [1610/1611] Linking build/arm/stm32h7/testsuites/samples/ticker.exe [1611/1611] Linking build/arm/stm32h7/testsuites/samples/unlimited.exe c:/users/robin/rtems/rtems-tools/rtems/6/bin/../lib/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/ld.exe:linkcmds.memory:84: syntax error collect2.exe: error: ld returned 1 exit status c:/users/robin/rtems/rtems-tools/rtems/6/bin/../lib/gcc/arm-rtems6/10.2.1/../../../../arm-rtems6/bin/ld.exe:linkcmds.memory:84: syntax error collect2.exe: error: ld returned 1 exit status Kind Regards Robin On Thu, 25 Mar 2021 at 13:15, Robin Müller <robin.muelle...@gmail.com> wrote: > That is how it was done in the lwIP demo provided by STM, I simply adopted > that. The SRAM3 is small, but big enough for lwIP, so all of it is used > completely by lwIP. > How would you place the descriptors in code so that these linker script > sections are not necessary? You mentioned RTEMS_SECTIONs. Are those used in > the source code? > > Kind Regards > Robin Müller > > On Mon, 22 Mar 2021 at 11:43, Sebastian Huber < > sebastian.hu...@embedded-brains.de> wrote: > >> On 03/02/2021 14:50, Robin Müller wrote: >> >> > The following link contains more theoretical information about why >> > these sections were placed at these addresses: >> > >> https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices >> > < >> https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices >> > >> > >> > Kind Regards >> > Robin >> > >> > On Wed, 3 Feb 2021 at 14:44, Robin Müller <robin.muelle...@gmail.com >> > <mailto:robin.muelle...@gmail.com>> wrote: >> > >> > The DMA descriptors need to be placed at the start of the SRAM3 >> > and need to be aligned in a certain way. The RX buffer will take >> > up the first (slightly less than) 16 kB of SRAM3 but needs to be >> > placed >> > behind the DMA descriptors. It also needs to be placed in a way >> > that the MPU configuration required for the DMA descriptors will >> > not do something with the RX buffers. >> > In the example provided by STM32, the first 256 bytes are >> > configured by MPU Config. >> > >> I had a look at the FAQ and the manual. Currently, we use the SRAM1 for >> the .nocache area. This is in the D2 domain. The Ethernet module is in >> the D2 domain. I am not sure why you have to change this to the smaller >> SRAM3? The libbsd driver works well with the current setting. >> >> -- >> embedded brains GmbH >> Herr Sebastian HUBER >> Dornierstr. 4 >> 82178 Puchheim >> Germany >> email: sebastian.hu...@embedded-brains.de >> phone: +49-89-18 94 741 - 16 >> fax: +49-89-18 94 741 - 08 >> >> Registergericht: Amtsgericht München >> Registernummer: HRB 157899 >> Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler >> Unsere Datenschutzerklärung finden Sie hier: >> https://embedded-brains.de/datenschutzerklaerung/ >> >>
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