From: Andrei Pistirica <andrei.pistir...@microchip.com>
Document the devicetree bindings for the UART peripheral found on
Microchip PIC32 class devices.
Signed-off-by: Andrei Pistirica <andrei.pistir...@microchip.com>
Signed-off-by: Joshua Henderson <joshua.hender...@microchip.com>
Cc: Ralf Baechle <r...@linux-mips.org>
---
.../bindings/serial/microchip,pic32-uart.txt | 29 ++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644
Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
diff --git a/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
b/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
new file mode 100644
index 0000000..65b38bf6
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/microchip,pic32-uart.txt
@@ -0,0 +1,29 @@
+* Microchip Universal Asynchronous Receiver Transmitter (UART)
+
+Required properties:
+- compatible: Should be "microchip,pic32mzda-uart"
+- reg: Should contain registers location and length
+- interrupts: Should contain interrupt
+- clocks: Phandle to the clock.
+ See: Documentation/devicetree/bindings/clock/clock-bindings.txt
+- pinctrl-names: A pinctrl state names "default" must be defined.
+- pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
+ See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
+
+Optional properties:
+- cts-gpios: CTS pin for UART
+
+Example:
+ uart1: serial@1f822000 {
+ compatible = "microchip,pic32mzda-uart";
+ reg = <0x1f822000 0x50>;
+ interrupts = <112 IRQ_TYPE_LEVEL_HIGH>,
+ <113 IRQ_TYPE_LEVEL_HIGH>,
+ <114 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&PBCLK2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1
+ &pinctrl_uart1_cts
+ &pinctrl_uart1_rts>;
+ cts-gpios = <&gpio1 15 0>;
+ };
--
1.7.9.5
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