On Mon, Nov 14, 2016 at 11:10:36AM +0100, Marek Vasut wrote:
> Add new driver for the MXSFB controller found in i.MX23/28/6SX .
> The MXSFB controller is a simple framebuffer controller with one
> parallel LCD output. Unlike the MXSFB fbdev driver that is used
> on these systems now, this driver uses the DRM/KMS framework.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Lucas Stach <l.stach at pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam at nxp.com>
> Cc: Shawn Guo <shawnguo at kernel.org>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> --
> V2: - Use drm_simple_kms_helper to reduce amount of common code
> - Add dedicated OF compatible for i.MX6SX
> V3: - Update to latest next/master
Imo looks all pretty. Please wrap up in a pull request as soon as you have
acks from dt and all that and then send a pull request to Dave.
Thanks, Daniel
> ---
> MAINTAINERS | 6 +
> drivers/gpu/drm/Kconfig | 2 +
> drivers/gpu/drm/Makefile | 1 +
> drivers/gpu/drm/mxsfb/Kconfig | 18 ++
> drivers/gpu/drm/mxsfb/Makefile | 2 +
> drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 241 ++++++++++++++++++++
> drivers/gpu/drm/mxsfb/mxsfb_drv.c | 444
> +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/mxsfb/mxsfb_drv.h | 54 +++++
> drivers/gpu/drm/mxsfb/mxsfb_out.c | 131 +++++++++++
> drivers/gpu/drm/mxsfb/mxsfb_regs.h | 114 ++++++++++
> 10 files changed, 1013 insertions(+)
> create mode 100644 drivers/gpu/drm/mxsfb/Kconfig
> create mode 100644 drivers/gpu/drm/mxsfb/Makefile
> create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_drv.c
> create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_drv.h
> create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_out.c
> create mode 100644 drivers/gpu/drm/mxsfb/mxsfb_regs.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 3f3f60b..f32b5df 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8339,6 +8339,12 @@ T: git git://linuxtv.org/mkrufky/tuners.git
> S: Maintained
> F: drivers/media/tuners/mxl5007t.*
>
> +MXSFB DRM DRIVER
> +M: Marek Vasut <marex at denx.de>
> +S: Supported
> +F: drivers/gpu/drm/mxsfb/
> +F: Documentation/devicetree/bindings/display/mxsfb-drm.txt
> +
> MYRICOM MYRI-10G 10GbE DRIVER (MYRI10GE)
> M: Hyong-Youb Kim <hykim at myri.com>
> L: netdev at vger.kernel.org
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index 863cdca..fbcb984 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -239,6 +239,8 @@ source "drivers/gpu/drm/mediatek/Kconfig"
>
> source "drivers/gpu/drm/zte/Kconfig"
>
> +source "drivers/gpu/drm/mxsfb/Kconfig"
> +
> # Keep legacy drivers last
>
> menuconfig DRM_LEGACY
> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
> index f217274..ac5e115 100644
> --- a/drivers/gpu/drm/Makefile
> +++ b/drivers/gpu/drm/Makefile
> @@ -88,3 +88,4 @@ obj-$(CONFIG_DRM_ETNAVIV) += etnaviv/
> obj-$(CONFIG_DRM_ARCPGU)+= arc/
> obj-y += hisilicon/
> obj-$(CONFIG_DRM_ZTE) += zte/
> +obj-$(CONFIG_DRM_MXSFB) += mxsfb/
> diff --git a/drivers/gpu/drm/mxsfb/Kconfig b/drivers/gpu/drm/mxsfb/Kconfig
> new file mode 100644
> index 0000000..0b6cb59
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/Kconfig
> @@ -0,0 +1,18 @@
> +config DRM_MXS
> + bool
> + help
> + Choose this option to select drivers for MXS FB devices
> +
> +config DRM_MXSFB
> + tristate "i.MX23/i.MX28/i.MX6SX MXSFB LCD controller"
> + depends on DRM && OF
> + depends on COMMON_CLK
> + select DRM_MXS
> + select DRM_KMS_HELPER
> + select DRM_KMS_FB_HELPER
> + select DRM_KMS_CMA_HELPER
> + help
> + Choose this option if you have an i.MX23/i.MX28/i.MX6SX MXSFB
> + LCD controller.
> +
> + If M is selected the module will be called mxsfb.
> diff --git a/drivers/gpu/drm/mxsfb/Makefile b/drivers/gpu/drm/mxsfb/Makefile
> new file mode 100644
> index 0000000..857f3a4
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/Makefile
> @@ -0,0 +1,2 @@
> +mxsfb-y := mxsfb_drv.o mxsfb_crtc.o mxsfb_out.o
> +obj-$(CONFIG_DRM_MXSFB) += mxsfb.o
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> new file mode 100644
> index 0000000..0818903
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_crtc.c
> @@ -0,0 +1,241 @@
> +/*
> + * Copyright (C) 2016 Marek Vasut <marex at denx.de>
> + *
> + * This code is based on drivers/video/fbdev/mxsfb.c :
> + * Copyright (C) 2010 Juergen Beisert, Pengutronix
> + * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
> + * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <drm/drmP.h>
> +#include <drm/drm_atomic_helper.h>
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_crtc_helper.h>
> +#include <drm/drm_fb_helper.h>
> +#include <drm/drm_fb_cma_helper.h>
> +#include <drm/drm_gem_cma_helper.h>
> +#include <drm/drm_of.h>
> +#include <drm/drm_plane_helper.h>
> +#include <drm/drm_simple_kms_helper.h>
> +#include <linux/clk.h>
> +#include <linux/iopoll.h>
> +#include <linux/of_graph.h>
> +#include <linux/platform_data/simplefb.h>
> +#include <video/videomode.h>
> +
> +#include "mxsfb_drv.h"
> +#include "mxsfb_regs.h"
> +
> +static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val)
> +{
> + return (val & mxsfb->devdata->hs_wdth_mask) <<
> + mxsfb->devdata->hs_wdth_shift;
> +}
> +
> +/* Setup the MXSFB registers for decoding the pixels out of the framebuffer
> */
> +static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb)
> +{
> + struct drm_crtc *crtc = &mxsfb->pipe.crtc;
> + struct drm_device *drm = crtc->dev;
> + const u32 format = crtc->primary->state->fb->pixel_format;
> + u32 ctrl, ctrl1;
> +
> + ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER;
> +
> + /*
> + * WARNING: The bus width, CTRL_SET_BUS_WIDTH(), is configured to
> + * match the selected mode here. This differs from the original
> + * MXSFB driver, which had the option to configure the bus width
> + * to arbitrary value. This limitation should not pose an issue.
> + */
> +
> + /* CTRL1 contains IRQ config and status bits, preserve those. */
> + ctrl1 = readl(mxsfb->base + LCDC_CTRL1);
> + ctrl1 &= CTRL1_CUR_FRAME_DONE_IRQ_EN | CTRL1_CUR_FRAME_DONE_IRQ;
> +
> + switch (format) {
> + case DRM_FORMAT_RGB565:
> + dev_dbg(drm->dev, "Setting up RGB565 mode\n");
> + ctrl |= CTRL_SET_BUS_WIDTH(STMLCDIF_16BIT);
> + ctrl |= CTRL_SET_WORD_LENGTH(0);
> + ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0xf);
> + break;
> + case DRM_FORMAT_XRGB8888:
> + dev_dbg(drm->dev, "Setting up XRGB8888 mode\n");
> + ctrl |= CTRL_SET_BUS_WIDTH(STMLCDIF_24BIT);
> + ctrl |= CTRL_SET_WORD_LENGTH(3);
> + /* Do not use packed pixels = one pixel per word instead. */
> + ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0x7);
> + break;
> + default:
> + dev_err(drm->dev, "Unhandled pixel format %08x\n", format);
> + return -EINVAL;
> + }
> +
> + writel(ctrl1, mxsfb->base + LCDC_CTRL1);
> + writel(ctrl, mxsfb->base + LCDC_CTRL);
> +
> + return 0;
> +}
> +
> +static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb)
> +{
> + u32 reg;
> +
> + if (mxsfb->clk_disp_axi)
> + clk_prepare_enable(mxsfb->clk_disp_axi);
> + clk_prepare_enable(mxsfb->clk);
> + mxsfb_enable_axi_clk(mxsfb);
> +
> + /* If it was disabled, re-enable the mode again */
> + writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET);
> +
> + /* Enable the SYNC signals first, then the DMA engine */
> + reg = readl(mxsfb->base + LCDC_VDCTRL4);
> + reg |= VDCTRL4_SYNC_SIGNALS_ON;
> + writel(reg, mxsfb->base + LCDC_VDCTRL4);
> +
> + writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET);
> +}
> +
> +static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb)
> +{
> + u32 reg;
> +
> + /*
> + * Even if we disable the controller here, it will still continue
> + * until its FIFOs are running out of data
> + */
> + writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_CLR);
> +
> + readl_poll_timeout(mxsfb->base + LCDC_CTRL, reg, !(reg & CTRL_RUN),
> + 0, 1000);
> +
> + reg = readl(mxsfb->base + LCDC_VDCTRL4);
> + reg &= ~VDCTRL4_SYNC_SIGNALS_ON;
> + writel(reg, mxsfb->base + LCDC_VDCTRL4);
> +
> + mxsfb_disable_axi_clk(mxsfb);
> +
> + clk_disable_unprepare(mxsfb->clk);
> + if (mxsfb->clk_disp_axi)
> + clk_disable_unprepare(mxsfb->clk_disp_axi);
> +}
> +
> +static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
> +{
> + struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode;
> + const u32 bus_flags = mxsfb->connector.display_info.bus_flags;
> + u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
> + int err;
> +
> + /*
> + * It seems, you can't re-program the controller if it is still
> + * running. This may lead to shifted pictures (FIFO issue?), so
> + * first stop the controller and drain its FIFOs.
> + */
> + mxsfb_enable_axi_clk(mxsfb);
> +
> + /* Clear the FIFOs */
> + writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET);
> +
> + err = mxsfb_set_pixel_fmt(mxsfb);
> + if (err)
> + return;
> +
> + clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);
> +
> + writel(TRANSFER_COUNT_SET_VCOUNT(m->crtc_vdisplay) |
> + TRANSFER_COUNT_SET_HCOUNT(m->crtc_hdisplay),
> + mxsfb->base + mxsfb->devdata->transfer_count);
> +
> + vsync_pulse_len = m->crtc_vsync_end - m->crtc_vsync_start;
> +
> + vdctrl0 = VDCTRL0_ENABLE_PRESENT | /* Always in DOTCLOCK mode */
> + VDCTRL0_VSYNC_PERIOD_UNIT |
> + VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
> + VDCTRL0_SET_VSYNC_PULSE_WIDTH(vsync_pulse_len);
> + if (m->flags & DRM_MODE_FLAG_PHSYNC)
> + vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
> + if (m->flags & DRM_MODE_FLAG_PVSYNC)
> + vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
> + if (bus_flags & DRM_BUS_FLAG_DE_HIGH)
> + vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
> + if (bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
> + vdctrl0 |= VDCTRL0_DOTCLK_ACT_FALLING;
> +
> + writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0);
> +
> + /* Frame length in lines. */
> + writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1);
> +
> + /* Line length in units of clocks or pixels. */
> + hsync_pulse_len = m->crtc_hsync_end - m->crtc_hsync_start;
> + writel(set_hsync_pulse_width(mxsfb, hsync_pulse_len) |
> + VDCTRL2_SET_HSYNC_PERIOD(m->crtc_htotal),
> + mxsfb->base + LCDC_VDCTRL2);
> +
> + writel(SET_HOR_WAIT_CNT(m->crtc_hblank_end - m->crtc_hsync_end) |
> + SET_VERT_WAIT_CNT(m->crtc_vblank_end - m->crtc_vsync_end),
> + mxsfb->base + LCDC_VDCTRL3);
> +
> + writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay),
> + mxsfb->base + LCDC_VDCTRL4);
> +
> + mxsfb_disable_axi_clk(mxsfb);
> +}
> +
> +void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
> +{
> + mxsfb_crtc_mode_set_nofb(mxsfb);
> + mxsfb_enable_controller(mxsfb);
> +}
> +
> +void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb)
> +{
> + mxsfb_disable_controller(mxsfb);
> +}
> +
> +void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb,
> + struct drm_plane_state *state)
> +{
> + struct drm_simple_display_pipe *pipe = &mxsfb->pipe;
> + struct drm_crtc *crtc = &pipe->crtc;
> + struct drm_framebuffer *fb = pipe->plane.state->fb;
> + struct drm_pending_vblank_event *event;
> + struct drm_gem_cma_object *gem;
> +
> + if (!crtc)
> + return;
> +
> + spin_lock_irq(&crtc->dev->event_lock);
> + event = crtc->state->event;
> + if (event) {
> + crtc->state->event = NULL;
> +
> + if (drm_crtc_vblank_get(crtc) == 0) {
> + drm_crtc_arm_vblank_event(crtc, event);
> + } else {
> + drm_crtc_send_vblank_event(crtc, event);
> + }
> + }
> + spin_unlock_irq(&crtc->dev->event_lock);
> +
> + if (!fb)
> + return;
> +
> + gem = drm_fb_cma_get_gem_obj(fb, 0);
> +
> + mxsfb_enable_axi_clk(mxsfb);
> + writel(gem->paddr, mxsfb->base + mxsfb->devdata->next_buf);
> + mxsfb_disable_axi_clk(mxsfb);
> +}
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.c
> b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
> new file mode 100644
> index 0000000..79a18bf
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.c
> @@ -0,0 +1,444 @@
> +/*
> + * Copyright (C) 2016 Marek Vasut <marex at denx.de>
> + *
> + * This code is based on drivers/video/fbdev/mxsfb.c :
> + * Copyright (C) 2010 Juergen Beisert, Pengutronix
> + * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
> + * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/module.h>
> +#include <linux/spinlock.h>
> +#include <linux/clk.h>
> +#include <linux/component.h>
> +#include <linux/list.h>
> +#include <linux/of_device.h>
> +#include <linux/of_graph.h>
> +#include <linux/of_reserved_mem.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/reservation.h>
> +
> +#include <drm/drmP.h>
> +#include <drm/drm_atomic.h>
> +#include <drm/drm_atomic_helper.h>
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_crtc_helper.h>
> +#include <drm/drm_fb_helper.h>
> +#include <drm/drm_fb_cma_helper.h>
> +#include <drm/drm_gem_cma_helper.h>
> +#include <drm/drm_of.h>
> +#include <drm/drm_panel.h>
> +#include <drm/drm_simple_kms_helper.h>
> +
> +#include "mxsfb_drv.h"
> +#include "mxsfb_regs.h"
> +
> +enum mxsfb_devtype {
> + MXSFB_V3,
> + MXSFB_V4,
> +};
> +
> +static const struct mxsfb_devdata mxsfb_devdata[] = {
> + [MXSFB_V3] = {
> + .transfer_count = LCDC_V3_TRANSFER_COUNT,
> + .cur_buf = LCDC_V3_CUR_BUF,
> + .next_buf = LCDC_V3_NEXT_BUF,
> + .debug0 = LCDC_V3_DEBUG0,
> + .hs_wdth_mask = 0xff,
> + .hs_wdth_shift = 24,
> + .ipversion = 3,
> + },
> + [MXSFB_V4] = {
> + .transfer_count = LCDC_V4_TRANSFER_COUNT,
> + .cur_buf = LCDC_V4_CUR_BUF,
> + .next_buf = LCDC_V4_NEXT_BUF,
> + .debug0 = LCDC_V4_DEBUG0,
> + .hs_wdth_mask = 0x3fff,
> + .hs_wdth_shift = 18,
> + .ipversion = 4,
> + },
> +};
> +
> +static const uint32_t mxsfb_formats[] = {
> + DRM_FORMAT_XRGB8888,
> + DRM_FORMAT_RGB565
> +};
> +
> +static struct mxsfb_drm_private *
> +drm_pipe_to_mxsfb_drm_private(struct drm_simple_display_pipe *pipe)
> +{
> + return container_of(pipe, struct mxsfb_drm_private, pipe);
> +}
> +
> +void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb)
> +{
> + if (mxsfb->clk_axi)
> + clk_prepare_enable(mxsfb->clk_axi);
> +}
> +
> +void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb)
> +{
> + if (mxsfb->clk_axi)
> + clk_disable_unprepare(mxsfb->clk_axi);
> +}
> +
> +static const struct drm_mode_config_funcs mxsfb_mode_config_funcs = {
> + .fb_create = drm_fb_cma_create,
> + .atomic_check = drm_atomic_helper_check,
> + .atomic_commit = drm_atomic_helper_commit,
> +};
> +
> +static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe,
> + struct drm_crtc_state *crtc_state)
> +{
> + struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
> +
> + mxsfb_crtc_enable(mxsfb);
> +}
> +
> +static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe)
> +{
> + struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
> +
> + mxsfb_crtc_disable(mxsfb);
> +}
> +
> +static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe,
> + struct drm_plane_state *plane_state)
> +{
> + struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
> +
> + mxsfb_plane_atomic_update(mxsfb, plane_state);
> +}
> +
> +static int mxsfb_pipe_prepare_fb(struct drm_simple_display_pipe *pipe,
> + struct drm_plane_state *plane_state)
> +{
> + return drm_fb_cma_prepare_fb(&pipe->plane, plane_state);
> +}
> +
> +struct drm_simple_display_pipe_funcs mxsfb_funcs = {
> + .enable = mxsfb_pipe_enable,
> + .disable = mxsfb_pipe_disable,
> + .update = mxsfb_pipe_update,
> + .prepare_fb = mxsfb_pipe_prepare_fb,
> +};
> +
> +static int mxsfb_load(struct drm_device *drm, unsigned long flags)
> +{
> + struct platform_device *pdev = to_platform_device(drm->dev);
> + struct mxsfb_drm_private *mxsfb;
> + struct resource *res;
> + int ret;
> +
> + mxsfb = devm_kzalloc(&pdev->dev, sizeof(*mxsfb), GFP_KERNEL);
> + if (!mxsfb)
> + return -ENOMEM;
> +
> + drm->dev_private = mxsfb;
> + mxsfb->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + mxsfb->base = devm_ioremap_resource(drm->dev, res);
> + if (IS_ERR(mxsfb->base))
> + return PTR_ERR(mxsfb->base);
> +
> + mxsfb->clk = devm_clk_get(drm->dev, NULL);
> + if (IS_ERR(mxsfb->clk))
> + return PTR_ERR(mxsfb->clk);
> +
> + mxsfb->clk_axi = devm_clk_get(drm->dev, "axi");
> + if (IS_ERR(mxsfb->clk_axi))
> + mxsfb->clk_axi = NULL;
> +
> + mxsfb->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi");
> + if (IS_ERR(mxsfb->clk_disp_axi))
> + mxsfb->clk_disp_axi = NULL;
> +
> + ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
> + if (ret)
> + return ret;
> +
> + pm_runtime_enable(drm->dev);
> +
> + ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
> + if (ret < 0) {
> + dev_err(drm->dev, "Failed to initialise vblank\n");
> + goto err_vblank;
> + }
> +
> + /* Modeset init */
> + drm_mode_config_init(drm);
> +
> + ret = mxsfb_create_output(drm);
> + if (ret < 0) {
> + dev_err(drm->dev, "Failed to create outputs\n");
> + goto err_vblank;
> + }
> +
> + ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs,
> + mxsfb_formats, ARRAY_SIZE(mxsfb_formats),
> + &mxsfb->connector);
> + if (ret < 0) {
> + dev_err(drm->dev, "Cannot setup simple display pipe\n");
> + goto err_vblank;
> + }
> +
> + ret = drm_panel_attach(mxsfb->panel, &mxsfb->connector);
> + if (ret) {
> + dev_err(drm->dev, "Cannot connect panel\n");
> + goto err_vblank;
> + }
> +
> + drm->mode_config.min_width = MXSFB_MIN_XRES;
> + drm->mode_config.min_height = MXSFB_MIN_YRES;
> + drm->mode_config.max_width = MXSFB_MAX_XRES;
> + drm->mode_config.max_height = MXSFB_MAX_YRES;
> + drm->mode_config.funcs = &mxsfb_mode_config_funcs;
> +
> + drm_mode_config_reset(drm);
> +
> + pm_runtime_get_sync(drm->dev);
> + ret = drm_irq_install(drm, platform_get_irq(pdev, 0));
> + pm_runtime_put_sync(drm->dev);
> +
> + if (ret < 0) {
> + dev_err(drm->dev, "Failed to install IRQ handler\n");
> + goto err_irq;
> + }
> +
> + drm_kms_helper_poll_init(drm);
> +
> + mxsfb->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
> + drm->mode_config.num_connector);
> + if (IS_ERR(mxsfb->fbdev)) {
> + mxsfb->fbdev = NULL;
> + dev_err(drm->dev, "Failed to init FB CMA area\n");
> + goto err_cma;
> + }
> +
> + platform_set_drvdata(pdev, drm);
> +
> + drm_helper_hpd_irq_event(drm);
> +
> + return 0;
> +
> +err_cma:
> + drm_irq_uninstall(drm);
> +err_irq:
> + drm_panel_detach(mxsfb->panel);
> +err_vblank:
> + pm_runtime_disable(drm->dev);
> +
> + return ret;
> +}
> +
> +static void mxsfb_unload(struct drm_device *drm)
> +{
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> +
> + if (mxsfb->fbdev)
> + drm_fbdev_cma_fini(mxsfb->fbdev);
> +
> + drm_kms_helper_poll_fini(drm);
> + drm_mode_config_cleanup(drm);
> + drm_vblank_cleanup(drm);
> +
> + pm_runtime_get_sync(drm->dev);
> + drm_irq_uninstall(drm);
> + pm_runtime_put_sync(drm->dev);
> +
> + drm->dev_private = NULL;
> +
> + pm_runtime_disable(drm->dev);
> +}
> +
> +static void mxsfb_lastclose(struct drm_device *drm)
> +{
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> +
> + drm_fbdev_cma_restore_mode(mxsfb->fbdev);
> +}
> +
> +static int mxsfb_enable_vblank(struct drm_device *drm, unsigned int crtc)
> +{
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> +
> + /* Clear and enable VBLANK IRQ */
> + mxsfb_enable_axi_clk(mxsfb);
> + writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
> + writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET);
> + mxsfb_disable_axi_clk(mxsfb);
> +
> + return 0;
> +}
> +
> +static void mxsfb_disable_vblank(struct drm_device *drm, unsigned int crtc)
> +{
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> +
> + /* Disable and clear VBLANK IRQ */
> + mxsfb_enable_axi_clk(mxsfb);
> + writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR);
> + writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
> + mxsfb_disable_axi_clk(mxsfb);
> +}
> +
> +static void mxsfb_irq_preinstall(struct drm_device *drm)
> +{
> + mxsfb_disable_vblank(drm, 0);
> +}
> +
> +static irqreturn_t mxsfb_irq_handler(int irq, void *data)
> +{
> + struct drm_device *drm = data;
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> + u32 reg;
> +
> + mxsfb_enable_axi_clk(mxsfb);
> +
> + reg = readl(mxsfb->base + LCDC_CTRL1);
> +
> + if (reg & CTRL1_CUR_FRAME_DONE_IRQ)
> + drm_crtc_handle_vblank(&mxsfb->pipe.crtc);
> +
> + writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
> +
> + mxsfb_disable_axi_clk(mxsfb);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static const struct file_operations fops = {
> + .owner = THIS_MODULE,
> + .open = drm_open,
> + .release = drm_release,
> + .unlocked_ioctl = drm_ioctl,
> +#ifdef CONFIG_COMPAT
> + .compat_ioctl = drm_compat_ioctl,
> +#endif
> + .poll = drm_poll,
> + .read = drm_read,
> + .llseek = noop_llseek,
> + .mmap = drm_gem_cma_mmap,
> +};
> +
> +static struct drm_driver mxsfb_driver = {
> + .driver_features = DRIVER_GEM | DRIVER_MODESET |
> + DRIVER_PRIME | DRIVER_ATOMIC |
> + DRIVER_HAVE_IRQ,
> + .lastclose = mxsfb_lastclose,
> + .irq_handler = mxsfb_irq_handler,
> + .irq_preinstall = mxsfb_irq_preinstall,
> + .irq_uninstall = mxsfb_irq_preinstall,
> + .get_vblank_counter = drm_vblank_no_hw_counter,
> + .enable_vblank = mxsfb_enable_vblank,
> + .disable_vblank = mxsfb_disable_vblank,
> + .gem_free_object = drm_gem_cma_free_object,
> + .gem_vm_ops = &drm_gem_cma_vm_ops,
> + .dumb_create = drm_gem_cma_dumb_create,
> + .dumb_map_offset = drm_gem_cma_dumb_map_offset,
> + .dumb_destroy = drm_gem_dumb_destroy,
> + .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
> + .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
> + .gem_prime_export = drm_gem_prime_export,
> + .gem_prime_import = drm_gem_prime_import,
> + .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
> + .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
> + .gem_prime_vmap = drm_gem_cma_prime_vmap,
> + .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
> + .gem_prime_mmap = drm_gem_cma_prime_mmap,
> + .fops = &fops,
> + .name = "mxsfb-drm",
> + .desc = "MXSFB Controller DRM",
> + .date = "20160824",
> + .major = 1,
> + .minor = 0,
> +};
> +
> +static const struct platform_device_id mxsfb_devtype[] = {
> + { .name = "imx23-fb", .driver_data = MXSFB_V3, },
> + { .name = "imx28-fb", .driver_data = MXSFB_V4, },
> + { .name = "imx6sx-fb", .driver_data = MXSFB_V4, },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
> +
> +static const struct of_device_id mxsfb_dt_ids[] = {
> + { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], },
> + { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
> + { .compatible = "fsl,imx6sx-lcdif", .data = &mxsfb_devtype[2], },
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mxsfb_dt_ids);
> +
> +static int mxsfb_probe(struct platform_device *pdev)
> +{
> + struct drm_device *drm;
> + const struct of_device_id *of_id =
> + of_match_device(mxsfb_dt_ids, &pdev->dev);
> + int ret;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + if (of_id)
> + pdev->id_entry = of_id->data;
> +
> + drm = drm_dev_alloc(&mxsfb_driver, &pdev->dev);
> + if (!drm)
> + return -ENOMEM;
> +
> + ret = mxsfb_load(drm, 0);
> + if (ret)
> + goto err_free;
> +
> + ret = drm_dev_register(drm, 0);
> + if (ret)
> + goto err_unload;
> +
> + return 0;
> +
> +err_unload:
> + mxsfb_unload(drm);
> +err_free:
> + drm_dev_unref(drm);
> +
> + return ret;
> +}
> +
> +static int mxsfb_remove(struct platform_device *pdev)
> +{
> + struct drm_device *drm = platform_get_drvdata(pdev);
> +
> + drm_dev_unregister(drm);
> + mxsfb_unload(drm);
> + drm_dev_unref(drm);
> +
> + return 0;
> +}
> +
> +static struct platform_driver mxsfb_platform_driver = {
> + .probe = mxsfb_probe,
> + .remove = mxsfb_remove,
> + .id_table = mxsfb_devtype,
> + .driver = {
> + .name = "mxsfb",
> + .of_match_table = mxsfb_dt_ids,
> + },
> +};
> +
> +module_platform_driver(mxsfb_platform_driver);
> +
> +MODULE_AUTHOR("Marek Vasut <marex at denx.de>");
> +MODULE_DESCRIPTION("Freescale MXS DRM/KMS driver");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_drv.h
> b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
> new file mode 100644
> index 0000000..5d0883f
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_drv.h
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright (C) 2016 Marek Vasut <marex at denx.de>
> + *
> + * i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __MXSFB_DRV_H__
> +#define __MXSFB_DRV_H__
> +
> +struct mxsfb_devdata {
> + unsigned int transfer_count;
> + unsigned int cur_buf;
> + unsigned int next_buf;
> + unsigned int debug0;
> + unsigned int hs_wdth_mask;
> + unsigned int hs_wdth_shift;
> + unsigned int ipversion;
> +};
> +
> +struct mxsfb_drm_private {
> + const struct mxsfb_devdata *devdata;
> +
> + void __iomem *base; /* registers */
> + struct clk *clk;
> + struct clk *clk_axi;
> + struct clk *clk_disp_axi;
> +
> + struct drm_simple_display_pipe pipe;
> + struct drm_connector connector;
> + struct drm_panel *panel;
> + struct drm_fbdev_cma *fbdev;
> +};
> +
> +int mxsfb_setup_crtc(struct drm_device *dev);
> +int mxsfb_create_output(struct drm_device *dev);
> +
> +void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb);
> +void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb);
> +
> +void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb);
> +void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb);
> +void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb,
> + struct drm_plane_state *state);
> +
> +#endif /* __MXSFB_DRV_H__ */
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_out.c
> b/drivers/gpu/drm/mxsfb/mxsfb_out.c
> new file mode 100644
> index 0000000..fa8d173
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_out.c
> @@ -0,0 +1,131 @@
> +/*
> + * Copyright (C) 2016 Marek Vasut <marex at denx.de>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/of_graph.h>
> +
> +#include <drm/drm_atomic.h>
> +#include <drm/drm_atomic_helper.h>
> +#include <drm/drm_crtc.h>
> +#include <drm/drm_crtc_helper.h>
> +#include <drm/drm_fb_cma_helper.h>
> +#include <drm/drm_gem_cma_helper.h>
> +#include <drm/drm_panel.h>
> +#include <drm/drm_plane_helper.h>
> +#include <drm/drm_simple_kms_helper.h>
> +#include <drm/drmP.h>
> +
> +#include "mxsfb_drv.h"
> +
> +static struct mxsfb_drm_private *
> +drm_connector_to_mxsfb_drm_private(struct drm_connector *connector)
> +{
> + return container_of(connector, struct mxsfb_drm_private, connector);
> +}
> +
> +static int mxsfb_panel_get_modes(struct drm_connector *connector)
> +{
> + struct mxsfb_drm_private *mxsfb =
> + drm_connector_to_mxsfb_drm_private(connector);
> +
> + if (mxsfb->panel)
> + return mxsfb->panel->funcs->get_modes(mxsfb->panel);
> +
> + return 0;
> +}
> +
> +static const struct
> +drm_connector_helper_funcs mxsfb_panel_connector_helper_funcs = {
> + .get_modes = mxsfb_panel_get_modes,
> +};
> +
> +static enum drm_connector_status
> +mxsfb_panel_connector_detect(struct drm_connector *connector, bool force)
> +{
> + struct mxsfb_drm_private *mxsfb =
> + drm_connector_to_mxsfb_drm_private(connector);
> +
> + if (mxsfb->panel)
> + return connector_status_connected;
> +
> + return connector_status_disconnected;
> +}
> +
> +static void mxsfb_panel_connector_destroy(struct drm_connector *connector)
> +{
> + struct mxsfb_drm_private *mxsfb =
> + drm_connector_to_mxsfb_drm_private(connector);
> +
> + if (mxsfb->panel)
> + drm_panel_detach(mxsfb->panel);
> +
> + drm_connector_unregister(connector);
> + drm_connector_cleanup(connector);
> +}
> +
> +static const struct drm_connector_funcs mxsfb_panel_connector_funcs = {
> + .dpms = drm_atomic_helper_connector_dpms,
> + .detect = mxsfb_panel_connector_detect,
> + .fill_modes = drm_helper_probe_single_connector_modes,
> + .destroy = mxsfb_panel_connector_destroy,
> + .reset = drm_atomic_helper_connector_reset,
> + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> +};
> +
> +static int mxsfb_attach_endpoint(struct drm_device *drm,
> + const struct of_endpoint *ep)
> +{
> + struct mxsfb_drm_private *mxsfb = drm->dev_private;
> + struct device_node *np;
> + struct drm_panel *panel;
> + int ret = -EPROBE_DEFER;
> +
> + np = of_graph_get_remote_port_parent(ep->local_node);
> + panel = of_drm_find_panel(np);
> + of_node_put(np);
> +
> + if (!panel)
> + return -EPROBE_DEFER;
> +
> + mxsfb->connector.dpms = DRM_MODE_DPMS_OFF;
> + mxsfb->connector.polled = 0;
> + drm_connector_helper_add(&mxsfb->connector,
> + &mxsfb_panel_connector_helper_funcs);
> + ret = drm_connector_init(drm, &mxsfb->connector,
> + &mxsfb_panel_connector_funcs,
> + DRM_MODE_CONNECTOR_Unknown);
> + if (!ret)
> + mxsfb->panel = panel;
> +
> + return ret;
> +}
> +
> +int mxsfb_create_output(struct drm_device *drm)
> +{
> + struct device_node *ep_np = NULL;
> + struct of_endpoint ep;
> + int ret;
> +
> + for_each_endpoint_of_node(drm->dev->of_node, ep_np) {
> + ret = of_graph_parse_endpoint(ep_np, &ep);
> + if (!ret)
> + ret = mxsfb_attach_endpoint(drm, &ep);
> +
> + if (ret) {
> + of_node_put(ep_np);
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/mxsfb/mxsfb_regs.h
> b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
> new file mode 100644
> index 0000000..31d62cd
> --- /dev/null
> +++ b/drivers/gpu/drm/mxsfb/mxsfb_regs.h
> @@ -0,0 +1,114 @@
> +/*
> + * Copyright (C) 2010 Juergen Beisert, Pengutronix
> + * Copyright (C) 2016 Marek Vasut <marex at denx.de>
> + *
> + * i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#ifndef __MXSFB_REGS_H__
> +#define __MXSFB_REGS_H__
> +
> +#define REG_SET 4
> +#define REG_CLR 8
> +
> +#define LCDC_CTRL 0x00
> +#define LCDC_CTRL1 0x10
> +#define LCDC_V3_TRANSFER_COUNT 0x20
> +#define LCDC_V4_TRANSFER_COUNT 0x30
> +#define LCDC_V4_CUR_BUF 0x40
> +#define LCDC_V4_NEXT_BUF 0x50
> +#define LCDC_V3_CUR_BUF 0x30
> +#define LCDC_V3_NEXT_BUF 0x40
> +#define LCDC_VDCTRL0 0x70
> +#define LCDC_VDCTRL1 0x80
> +#define LCDC_VDCTRL2 0x90
> +#define LCDC_VDCTRL3 0xa0
> +#define LCDC_VDCTRL4 0xb0
> +#define LCDC_V4_DEBUG0 0x1d0
> +#define LCDC_V3_DEBUG0 0x1f0
> +
> +#define CTRL_SFTRST (1 << 31)
> +#define CTRL_CLKGATE (1 << 30)
> +#define CTRL_BYPASS_COUNT (1 << 19)
> +#define CTRL_VSYNC_MODE (1 << 18)
> +#define CTRL_DOTCLK_MODE (1 << 17)
> +#define CTRL_DATA_SELECT (1 << 16)
> +#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
> +#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
> +#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
> +#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
> +#define CTRL_MASTER (1 << 5)
> +#define CTRL_DF16 (1 << 3)
> +#define CTRL_DF18 (1 << 2)
> +#define CTRL_DF24 (1 << 1)
> +#define CTRL_RUN (1 << 0)
> +
> +#define CTRL1_FIFO_CLEAR (1 << 21)
> +#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
> +#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
> +#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13)
> +#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9)
> +
> +#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
> +#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
> +#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
> +#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
> +
> +#define VDCTRL0_ENABLE_PRESENT (1 << 28)
> +#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27)
> +#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26)
> +#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25)
> +#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24)
> +#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21)
> +#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20)
> +#define VDCTRL0_HALF_LINE (1 << 19)
> +#define VDCTRL0_HALF_LINE_MODE (1 << 18)
> +#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
> +#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
> +
> +#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
> +#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
> +
> +#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29)
> +#define VDCTRL3_VSYNC_ONLY (1 << 28)
> +#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
> +#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
> +#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
> +#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
> +
> +#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
> +#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
> +#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18)
> +#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
> +
> +#define DEBUG0_HSYNC (1 < 26)
> +#define DEBUG0_VSYNC (1 < 25)
> +
> +#define MXSFB_MIN_XRES 120
> +#define MXSFB_MIN_YRES 120
> +#define MXSFB_MAX_XRES 0xffff
> +#define MXSFB_MAX_YRES 0xffff
> +
> +#define RED 0
> +#define GREEN 1
> +#define BLUE 2
> +#define TRANSP 3
> +
> +#define STMLCDIF_8BIT 1 /* pixel data bus to the display is of 8 bit width
> */
> +#define STMLCDIF_16BIT 0 /* pixel data bus to the display is of 16 bit width
> */
> +#define STMLCDIF_18BIT 2 /* pixel data bus to the display is of 18 bit width
> */
> +#define STMLCDIF_24BIT 3 /* pixel data bus to the display is of 24 bit width
> */
> +
> +#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
> +#define MXSFB_SYNC_DOTCLK_FALLING_ACT (1 << 7) /* negative edge
> sampling */
> +
> +#endif /* __MXSFB_REGS_H__ */
> --
> 2.10.2
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
