Hi, Yongqiang:
On Thu, 2019-08-29 at 22:50 +0800, yongqiang....@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang....@mediatek.com>
>
> this patch add add connection from OVL_2L0 to RDMA0
Reviewed-by: CK Hu <ck...@mediatek.com>
>
> Signed-off-by: Yongqiang Niu <yongqiang....@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index aa6173b..943e114 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -33,6 +33,12 @@
> #define DISP_REG_CONFIG_DSI_SEL 0x050
> #define DISP_REG_CONFIG_DPI_SEL 0x064
>
> +#define MT8183_DISP_OVL0_2L_MOUT_EN 0xf04
> +#define MT8183_DISP_PATH0_SEL_IN 0xf24
> +
> +#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
> +#define DISP_PATH0_SEL_IN_OVL0_2L 0x1
> +
> #define MT2701_DISP_MUTEX0_MOD0 0x2c
> #define MT2701_DISP_MUTEX0_SOF0 0x30
>
> @@ -307,6 +313,10 @@ static unsigned int mtk_ddp_mout_en(const struct
> mtk_mmsys_reg_data *data,
> } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_OVL_2L0) {
> *addr = data->ovl0_mout_en;
> value = OVL0_MOUT_EN_OVL0_2L;
> + } else if (cur == DDP_COMPONENT_OVL_2L0 &&
> + next == DDP_COMPONENT_RDMA0) {
> + *addr = MT8183_DISP_OVL0_2L_MOUT_EN;
> + value = OVL0_2L_MOUT_EN_DISP_PATH0;
> } else {
> value = 0;
> }
> @@ -366,6 +376,10 @@ static unsigned int mtk_ddp_sel_in(const struct
> mtk_mmsys_reg_data *data,
> } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
> *addr = DISP_REG_CONFIG_DSI_SEL;
> value = DSI_SEL_IN_BLS;
> + } else if (cur == DDP_COMPONENT_OVL_2L0 &&
> + next == DDP_COMPONENT_RDMA0) {
> + *addr = MT8183_DISP_PATH0_SEL_IN;
> + value = DISP_PATH0_SEL_IN_OVL0_2L;
> } else {
> value = 0;
> }
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