Hi, Yongqiang:
On Thu, 2019-08-29 at 22:50 +0800, yongqiang....@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang....@mediatek.com>
>
> This patch add connection from RDMA0 to DSI0
Reviewed-by: CK Hu <ck...@mediatek.com>
>
> Signed-off-by: Yongqiang Niu <yongqiang....@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> index fd38658..6a7cb15 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
> @@ -42,6 +42,7 @@
> #define OVL1_2L_MOUT_EN_RDMA1 BIT(4)
> #define DITHER0_MOUT_IN_DSI0 BIT(0)
> #define DISP_PATH0_SEL_IN_OVL0_2L 0x1
> +#define DSI0_SEL_IN_RDMA0 0x1
>
> #define MT2701_DISP_MUTEX0_MOD0 0x2c
> #define MT2701_DISP_MUTEX0_SOF0 0x30
> @@ -391,6 +392,9 @@ static unsigned int mtk_ddp_sel_in(const struct
> mtk_mmsys_reg_data *data,
> next == DDP_COMPONENT_RDMA0) {
> *addr = MT8183_DISP_PATH0_SEL_IN;
> value = DISP_PATH0_SEL_IN_OVL0_2L;
> + } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI0) {
> + *addr = data->dsi0_sel_in;
> + value = DSI0_SEL_IN_RDMA0;
> } else {
> value = 0;
> }
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