Expose VCLK2_SEL clock id and add new ids for the CTS_ENCL and CTS_ENCL_SEL
clocks on G12A compatible SoCs.

Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org>
---
 drivers/clk/meson/g12a.h              | 1 -
 include/dt-bindings/clock/g12a-clkc.h | 3 +++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h
index a97613df38b3..1a4a626c2c63 100644
--- a/drivers/clk/meson/g12a.h
+++ b/drivers/clk/meson/g12a.h
@@ -168,7 +168,6 @@
 #define CLKID_VID_PLL_SEL                      130
 #define CLKID_VID_PLL_DIV                      131
 #define CLKID_VCLK_SEL                         132
-#define CLKID_VCLK2_SEL                                133
 #define CLKID_VCLK_INPUT                       134
 #define CLKID_VCLK2_INPUT                      135
 #define CLKID_VCLK_DIV                         136
diff --git a/include/dt-bindings/clock/g12a-clkc.h 
b/include/dt-bindings/clock/g12a-clkc.h
index a93b58c5e18e..80421d7982dd 100644
--- a/include/dt-bindings/clock/g12a-clkc.h
+++ b/include/dt-bindings/clock/g12a-clkc.h
@@ -108,6 +108,7 @@
 #define CLKID_VAPB                             124
 #define CLKID_HDMI_PLL                         128
 #define CLKID_VID_PLL                          129
+#define CLKID_VCLK2_SEL                                133
 #define CLKID_VCLK                             138
 #define CLKID_VCLK2                            139
 #define CLKID_VCLK_DIV1                                148
@@ -149,5 +150,7 @@
 #define CLKID_NNA_CORE_CLK                     267
 #define CLKID_MIPI_DSI_PXCLK_SEL               269
 #define CLKID_MIPI_DSI_PXCLK                   270
+#define CLKID_CTS_ENCL                         271
+#define CLKID_CTS_ENCL_SEL                     272
 
 #endif /* __G12A_CLKC_H */

-- 
2.34.1

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