[PATCH v8 4/7] drm: atmel-hlcdc: add DPI mode support for XLCDC

[Manikandan Muralidharan]

Add support for Display Pixel Interface (DPI) Compatible Mode
support in atmel-hlcdc driver for XLCDC IP along with legacy
pixel mapping. DPI mode BIT is configured in LCDC_CFG5 register.

Signed-off-by: Manikandan Muralidharan <manikanda...@microchip.com>
[durai.manicka...@microchip.com: update DPI mode bit using is_xlcdc flag]
Signed-off-by: Durai Manickam KR <durai.manicka...@microchip.com>
---
 .../gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c    | 21 +++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c 
b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 98a98b5fca85..fdd3a6bc0f79 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -30,10 +30,12 @@
  *
  * @base: base CRTC state
  * @output_mode: RGBXXX output mode
+ * @dpi: output DPI mode
  */
 struct atmel_hlcdc_crtc_state {
        struct drm_crtc_state base;
        unsigned int output_mode;
+       u8 dpi;
 };
 
 static inline struct atmel_hlcdc_crtc_state *
@@ -170,6 +172,8 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc 
*c)
 
                if (adj->flags & DRM_MODE_FLAG_NHSYNC)
                        cfg |= ATMEL_HLCDC_HSPOL;
+       } else {
+               cfg |= state->dpi << 11;
        }
 
        regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
@@ -177,7 +181,9 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc 
*c)
                           ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
                           ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
                           ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
-                          ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
+                          ATMEL_HLCDC_GUARDTIME_MASK |
+                          (crtc->dc->desc->is_xlcdc ? ATMEL_XLCDC_MODE_MASK |
+                          ATMEL_XLCDC_DPI : ATMEL_HLCDC_MODE_MASK),
                           cfg);
 
        clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
@@ -380,7 +386,15 @@ static int atmel_hlcdc_crtc_select_output_mode(struct 
drm_crtc_state *state)
 
        hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
        hstate->output_mode = fls(output_fmts) - 1;
-
+       if (crtc->dc->desc->is_xlcdc) {
+               /* check if MIPI DPI bit needs to be set */
+               if (fls(output_fmts) > 3) {
+                       hstate->output_mode -= 4;
+                       hstate->dpi = 1;
+               } else {
+                       hstate->dpi = 0;
+               }
+       }
        return 0;
 }
 
@@ -484,6 +498,7 @@ static struct drm_crtc_state *
 atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 {
        struct atmel_hlcdc_crtc_state *state, *cur;
+       struct atmel_hlcdc_crtc *c = drm_crtc_to_atmel_hlcdc_crtc(crtc);
 
        if (WARN_ON(!crtc->state))
                return NULL;
@@ -495,6 +510,8 @@ atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 
        cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
        state->output_mode = cur->output_mode;
+       if (c->dc->desc->is_xlcdc)
+               state->dpi = cur->dpi;
 
        return &state->base;
 }
-- 
2.25.1