[PATCH 2/5] phy: qcom: edp: Introduce aux_cfg array for version specific aux settings

[Soutrik Mukhopadhyay]

In order to support different HW versions, introduce aux_cfg array
to move v4 specific aux configuration settings.

Signed-off-by: Soutrik Mukhopadhyay <quic_mukho...@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-edp.c | 34 +++++++++++++++++------------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c 
b/drivers/phy/qualcomm/phy-qcom-edp.c
index da2b32fb5b45..0f860a807d1b 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -90,6 +90,7 @@ struct phy_ver_ops {
 
 struct qcom_edp_phy_cfg {
        bool is_edp;
+       u8 *aux_cfg;
        const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg;
        const struct phy_ver_ops *ver_ops;
 };
@@ -186,11 +187,14 @@ static const struct qcom_edp_swing_pre_emph_cfg 
edp_phy_swing_pre_emph_cfg = {
        .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3,
 };
 
+static u8 edp_phy_aux_cfg_v4[10] = {
+       0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03
+};
+
 static int qcom_edp_phy_init(struct phy *phy)
 {
        struct qcom_edp *edp = phy_get_drvdata(phy);
        int ret;
-       u8 cfg8;
 
        ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies);
        if (ret)
@@ -222,22 +226,20 @@ static int qcom_edp_phy_init(struct phy *phy)
         * even needed.
         */
        if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp)
-               cfg8 = 0xb7;
-       else
-               cfg8 = 0x37;
+               edp->cfg->aux_cfg[8] = 0xb7;
 
        writel(0xfc, edp->edp + DP_PHY_MODE);
 
-       writel(0x00, edp->edp + DP_PHY_AUX_CFG0);
-       writel(0x13, edp->edp + DP_PHY_AUX_CFG1);
-       writel(0x24, edp->edp + DP_PHY_AUX_CFG2);
-       writel(0x00, edp->edp + DP_PHY_AUX_CFG3);
-       writel(0x0a, edp->edp + DP_PHY_AUX_CFG4);
-       writel(0x26, edp->edp + DP_PHY_AUX_CFG5);
-       writel(0x0a, edp->edp + DP_PHY_AUX_CFG6);
-       writel(0x03, edp->edp + DP_PHY_AUX_CFG7);
-       writel(cfg8, edp->edp + DP_PHY_AUX_CFG8);
-       writel(0x03, edp->edp + DP_PHY_AUX_CFG9);
+       writel(edp->cfg->aux_cfg[0], edp->edp + DP_PHY_AUX_CFG0);
+       writel(edp->cfg->aux_cfg[1], edp->edp + DP_PHY_AUX_CFG1);
+       writel(edp->cfg->aux_cfg[2], edp->edp + DP_PHY_AUX_CFG2);
+       writel(edp->cfg->aux_cfg[3], edp->edp + DP_PHY_AUX_CFG3);
+       writel(edp->cfg->aux_cfg[4], edp->edp + DP_PHY_AUX_CFG4);
+       writel(edp->cfg->aux_cfg[5], edp->edp + DP_PHY_AUX_CFG5);
+       writel(edp->cfg->aux_cfg[6], edp->edp + DP_PHY_AUX_CFG6);
+       writel(edp->cfg->aux_cfg[7], edp->edp + DP_PHY_AUX_CFG7);
+       writel(edp->cfg->aux_cfg[8], edp->edp + DP_PHY_AUX_CFG8);
+       writel(edp->cfg->aux_cfg[9], edp->edp + DP_PHY_AUX_CFG9);
 
        writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK |
               PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK |
@@ -519,16 +521,19 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = {
 };
 
 static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = {
+       .aux_cfg = edp_phy_aux_cfg_v4,
        .ver_ops = &qcom_edp_phy_ops_v4,
 };
 
 static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = {
+       .aux_cfg = edp_phy_aux_cfg_v4,
        .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
        .ver_ops = &qcom_edp_phy_ops_v4,
 };
 
 static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = {
        .is_edp = true,
+       .aux_cfg = edp_phy_aux_cfg_v4,
        .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg,
        .ver_ops = &qcom_edp_phy_ops_v4,
 };
@@ -707,6 +712,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = {
 };
 
 static struct qcom_edp_phy_cfg x1e80100_phy_cfg = {
+       .aux_cfg = edp_phy_aux_cfg_v4,
        .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg,
        .ver_ops = &qcom_edp_phy_ops_v6,
 };
-- 
2.17.1