Re: [PATCH 3/5] phy: qcom: edp: Add support for eDP PHY on SA8775P

[Soutrik Mukhopadhyay]

On 9/11/2024 4:10 PM, Dmitry Baryshkov wrote:

On Wed, 11 Sept 2024 at 13:08, Soutrik Mukhopadhyay
<quic_mukho...@quicinc.com> wrote:

Add support for eDP PHY v5 found on the Qualcomm SA8775P platform.

Signed-off-by: Soutrik Mukhopadhyay <quic_mukho...@quicinc.com>
---
  drivers/phy/qualcomm/phy-qcom-edp.c | 47 +++++++++++++++++++++++++++++
  1 file changed, 47 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c 
b/drivers/phy/qualcomm/phy-qcom-edp.c
index 0f860a807d1b..34a47cd2919d 100644
--- a/drivers/phy/qualcomm/phy-qcom-edp.c
+++ b/drivers/phy/qualcomm/phy-qcom-edp.c
@@ -191,6 +191,45 @@ static u8 edp_phy_aux_cfg_v4[10] = {
         0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03
  };

+static const u8 edp_swing_hbr_rbr_v5[4][4] = {
+       { 0x07, 0x0f, 0x16, 0x1f },
+       { 0x0d, 0x16, 0x1e, 0xff },
+       { 0x11, 0x1b, 0xff, 0xff },
+       { 0x16, 0xff, 0xff, 0xff }
+};

Same as v4

Yes, we will reuse edp_swing_hbr_rbr for v5.

+
+static const u8 edp_pre_emp_hbr_rbr_v5[4][4] = {
+       { 0x05, 0x11, 0x17, 0x1d },
+       { 0x05, 0x11, 0x18, 0xff },
+       { 0x06, 0x11, 0xff, 0xff },
+       { 0x00, 0xff, 0xff, 0xff }
+};

Could you please confirm that there is a single value difference?

Yes, there is a single value difference.

+
+static const u8 edp_swing_hbr2_hbr3_v5[4][4] = {
+       { 0x0b, 0x11, 0x17, 0x1c },
+       { 0x10, 0x19, 0x1f, 0xff },
+       { 0x19, 0x1f, 0xff, 0xff },
+       { 0x1f, 0xff, 0xff, 0xff }
+};

Same as v4

Yes, we will reuse edp_swing_hbr2_hbr3 for v5.

+
+static const u8 edp_pre_emp_hbr2_hbr3_v5[4][4] = {
+       { 0x0c, 0x15, 0x19, 0x1e },
+       { 0x0b, 0x15, 0x19, 0xff },
+       { 0x0e, 0x14, 0xff, 0xff },
+       { 0x0d, 0xff, 0xff, 0xff }
+};

This one looks fine

+
+static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg_v5 
= {
+       .swing_hbr_rbr = &edp_swing_hbr_rbr_v5,
+       .swing_hbr3_hbr2 = &edp_swing_hbr2_hbr3_v5,
+       .pre_emphasis_hbr_rbr = &edp_pre_emp_hbr_rbr_v5,
+       .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3_v5,
+};
+
+static u8 edp_phy_aux_cfg_v5[10] = {
+       0x00, 0x13, 0xa4, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03
+};
+
  static int qcom_edp_phy_init(struct phy *phy)
  {
         struct qcom_edp *edp = phy_get_drvdata(phy);
@@ -520,6 +559,13 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = {
         .com_configure_ssc      = qcom_edp_com_configure_ssc_v4,
  };

+static const struct qcom_edp_phy_cfg sa8775p_dp_phy_cfg = {
+       .is_edp = false,
+       .aux_cfg = edp_phy_aux_cfg_v5,
+       .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg_v5,
+       .ver_ops = &qcom_edp_phy_ops_v4,
+};
+
  static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = {
         .aux_cfg = edp_phy_aux_cfg_v4,
         .ver_ops = &qcom_edp_phy_ops_v4,
@@ -1114,6 +1160,7 @@ static int qcom_edp_phy_probe(struct platform_device 
*pdev)
  }

  static const struct of_device_id qcom_edp_phy_match_table[] = {
+       { .compatible = "qcom,sa8775p-edp-phy", .data = &sa8775p_dp_phy_cfg, },
         { .compatible = "qcom,sc7280-edp-phy", .data = &sc7280_dp_phy_cfg, },
         { .compatible = "qcom,sc8180x-edp-phy", .data = &sc7280_dp_phy_cfg, },
         { .compatible = "qcom,sc8280xp-dp-phy", .data = &sc8280xp_dp_phy_cfg, 
},
--
2.17.1