Exynos7870's DSIM device doesn't require waiting for the header FIFO
during a MIPI DSI transfer. Add a flag in the driver data in order to
control said behavior.

Signed-off-by: Kaustabh Chakraborty <[email protected]>
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 15 ++++++++++++---
 include/drm/bridge/samsung-dsim.h     |  1 +
 2 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c 
b/drivers/gpu/drm/bridge/samsung-dsim.c
index 
e7287c289e0f8d01e295407578817801bad9d8c8..356c949aaa030a2ecc39beb43ae8608c1e6af828
 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -416,6 +416,7 @@ static const struct samsung_dsim_driver_data 
exynos3_dsi_driver_data = {
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 1000,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 1,
        .num_bits_resol = 11,
        .pll_p_offset = 13,
@@ -435,6 +436,7 @@ static const struct samsung_dsim_driver_data 
exynos4_dsi_driver_data = {
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 1000,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 1,
        .num_bits_resol = 11,
        .pll_p_offset = 13,
@@ -452,6 +454,7 @@ static const struct samsung_dsim_driver_data 
exynos5_dsi_driver_data = {
        .plltmr_reg = 0x58,
        .num_clks = 2,
        .max_freq = 1000,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 1,
        .num_bits_resol = 11,
        .pll_p_offset = 13,
@@ -469,6 +472,7 @@ static const struct samsung_dsim_driver_data 
exynos5433_dsi_driver_data = {
        .has_clklane_stop = 1,
        .num_clks = 5,
        .max_freq = 1500,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 0,
        .num_bits_resol = 12,
        .pll_p_offset = 13,
@@ -486,6 +490,7 @@ static const struct samsung_dsim_driver_data 
exynos5422_dsi_driver_data = {
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 1500,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 1,
        .num_bits_resol = 12,
        .pll_p_offset = 13,
@@ -503,6 +508,7 @@ static const struct samsung_dsim_driver_data 
imx8mm_dsi_driver_data = {
        .has_clklane_stop = 1,
        .num_clks = 2,
        .max_freq = 2100,
+       .wait_for_hdr_fifo = 1,
        .wait_for_reset = 0,
        .num_bits_resol = 12,
        /*
@@ -1109,6 +1115,7 @@ static void samsung_dsim_send_to_fifo(struct samsung_dsim 
*dsi,
 {
        struct device *dev = dsi->dev;
        struct mipi_dsi_packet *pkt = &xfer->packet;
+       const struct samsung_dsim_driver_data *driver_data = dsi->driver_data;
        const u8 *payload = pkt->payload + xfer->tx_done;
        u16 length = pkt->payload_length - xfer->tx_done;
        bool first = !xfer->tx_done;
@@ -1149,9 +1156,11 @@ static void samsung_dsim_send_to_fifo(struct 
samsung_dsim *dsi,
                return;
 
        reg = get_unaligned_le32(pkt->header);
-       if (samsung_dsim_wait_for_hdr_fifo(dsi)) {
-               dev_err(dev, "waiting for header FIFO timed out\n");
-               return;
+       if (driver_data->wait_for_hdr_fifo) {
+               if (samsung_dsim_wait_for_hdr_fifo(dsi)) {
+                       dev_err(dev, "waiting for header FIFO timed out\n");
+                       return;
+               }
        }
 
        if (NEQV(xfer->flags & MIPI_DSI_MSG_USE_LPM,
diff --git a/include/drm/bridge/samsung-dsim.h 
b/include/drm/bridge/samsung-dsim.h
index 
a50e4f521b9d9561f6a3b9fe3e174c0e140849a2..3641c57557f42fd90cd2e8c0282f69dbe36ba2de
 100644
--- a/include/drm/bridge/samsung-dsim.h
+++ b/include/drm/bridge/samsung-dsim.h
@@ -60,6 +60,7 @@ struct samsung_dsim_driver_data {
        unsigned int num_clks;
        unsigned int min_freq;
        unsigned int max_freq;
+       unsigned int wait_for_hdr_fifo;
        unsigned int wait_for_reset;
        unsigned int num_bits_resol;
        unsigned int pll_p_offset;

-- 
2.49.0

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