Parse the data lane count out of DT. Limit the supported data lanes to 1..4 which is the maximum available DSI pairs on the connector of any known panels which may use this bridge. Internally, this bridge is an ChipOne ICN6211 which loads its register configuration from a dedicated storage and its I2C does not seem to be accessible. The ICN6211 also supports up to 4 DSI lanes, so this is a hard limit.
To avoid any breakage on old DTs where the parsing of data lanes from DT may fail, fall back to the original hard-coded value of 2 lanes and warn user. The lane configuration is preconfigured in the bridge for each of the WaveShare panels. The 13.3" DSI panel works with 4-lane configuration, others seem to use 2-lane configuration. This is a hardware property, so the actual count should come from DT. Reviewed-by: Joseph Guo <[email protected]> Signed-off-by: Marek Vasut <[email protected]> --- Cc: Andrzej Hajda <[email protected]> Cc: Conor Dooley <[email protected]> Cc: David Airlie <[email protected]> Cc: Jernej Skrabec <[email protected]> Cc: Jonas Karlman <[email protected]> Cc: Joseph Guo <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Neil Armstrong <[email protected]> Cc: Rob Herring <[email protected]> Cc: Robert Foss <[email protected]> Cc: Simona Vetter <[email protected]> Cc: Thomas Zimmermann <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] --- V2: - Add RB from Joseph - Update the error print to "Invalid{ +or missing+}" --- drivers/gpu/drm/bridge/waveshare-dsi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/waveshare-dsi.c b/drivers/gpu/drm/bridge/waveshare-dsi.c index 9254446f54958..0497c7ecbc7a5 100644 --- a/drivers/gpu/drm/bridge/waveshare-dsi.c +++ b/drivers/gpu/drm/bridge/waveshare-dsi.c @@ -66,7 +66,12 @@ static int ws_bridge_attach_dsi(struct ws_bridge *ws) dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS; dsi->format = MIPI_DSI_FMT_RGB888; - dsi->lanes = 2; + dsi->lanes = drm_of_get_data_lanes_count_ep(dev->of_node, 0, 0, 1, 4); + if (dsi->lanes < 0) { + dev_warn(dev, "Invalid or missing DSI lane count %d, falling back to 2 lanes\n", + dsi->lanes); + dsi->lanes = 2; /* Old DT backward compatibility */ + } ret = devm_mipi_dsi_attach(dev, dsi); if (ret < 0) -- 2.51.0
