Describe 1..4 DSI lanes as supported. Internally, this bridge is an ChipOne ICN6211 which loads its register configuration from a dedicated storage and its I2C does not seem to be accessible. The ICN6211 supports up to 4 DSI lanes, so this is a hard limit for this bridge. The lane configuration is preconfigured in the bridge for each of the WaveShare panels.
Signed-off-by: Marek Vasut <[email protected]> --- Cc: Andrzej Hajda <[email protected]> Cc: Conor Dooley <[email protected]> Cc: David Airlie <[email protected]> Cc: Jernej Skrabec <[email protected]> Cc: Jonas Karlman <[email protected]> Cc: Joseph Guo <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Neil Armstrong <[email protected]> Cc: Rob Herring <[email protected]> Cc: Robert Foss <[email protected]> Cc: Simona Vetter <[email protected]> Cc: Thomas Zimmermann <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] --- V2: No change --- .../devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml index 5e8498c8303dd..3820dd7e11af1 100644 --- a/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/waveshare,dsi2dpi.yaml @@ -40,9 +40,12 @@ properties: properties: data-lanes: description: array of physical DSI data lane indexes. + minItems: 1 items: - const: 1 - const: 2 + - const: 3 + - const: 4 required: - data-lanes -- 2.51.0
