Add the generic "arm,mali-gen5-am" compatible for Mali Gen5 AM GPU integrations.
Mali Gen5 AM systems use the external AM_GOVERNOR block for frequency scaling, so OPP, cooling and local GPU supply properties are not valid for this compatible. Add a matching example node. Signed-off-by: Karunika Choo <[email protected]> --- .../bindings/gpu/arm,mali-valhall-csf.yaml | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml index 8eccd4338a2b2..a1e85570b4b3b 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml @@ -22,6 +22,7 @@ properties: - nxp,imx95-mali # G310 - rockchip,rk3588-mali - const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable + - const: arm,mali-gen5-am reg: maxItems: 1 @@ -146,6 +147,19 @@ allOf: - nvmem-cells - nvmem-cell-names - power-domains + - if: + properties: + compatible: + contains: + const: arm,mali-gen5-am + then: + properties: + mali-supply: false + sram-supply: false + operating-points-v2: false + opp-table: false + "#cooling-cells": false + dynamic-power-coefficient: false examples: - | @@ -195,5 +209,15 @@ examples: nvmem-cell-names = "shader-present"; power-domains = <&gpufreq>; }; - + - | + gpu@100000 { + compatible = "arm,mali-gen5-am"; + reg = <0x100000 0x480000>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&gpu_clock 0>, <&gpu_clock 1>, <&gpu_clock 2>; + clock-names = "core", "coregroup", "stacks"; + }; ... -- 2.43.0
