> -----Original Message-----
> From: Nautiyal, Ankit K <[email protected]>
> Sent: Monday, October 12, 2026 9:27 AM
> To: [email protected]; [email protected]
> Cc: [email protected]; [email protected]; Shankar, Uma
> <[email protected]>; [email protected]; Kandpal, Suraj
> <[email protected]>
> Subject: [PATCH v2 01/56] drm/i915/hdmi: Parse FRL max link rate from VBT
> 
> From: Vandita Kulkarni <[email protected]>
> 
> Parse the maximum FRL link rate from VBT and store it for use during FRL mode
> selection and link training.

There is nothing getting stored here, maybe rephrase it to expose helper to get
FRL max link rate.

> 
> v3:
> - Bail out early for VBT version < 237 and resolve the max FRL rate in a
>   single switch, handling hdmi_max_frl_rate_valid == 0 up front. (Jani)
> - Drop the intel_bios_hdmi_max_frl_rate() encoder wrapper and take the
>   encoder devdata directly. (Jani)
> - Use the standard VBT debug message format. (Jani)
> - Spell FRL and VBT in caps in the subject and debug message. (Suraj, Jani)
> - Move the hdmi_max_frl_rate_valid == 0 comment onto the check it
>   describes. (Suraj)
> - Add Bspec reference. (Suraj)
> 
> Bspec: XXXXX

Put a valid number here or drop it altogether.

> Signed-off-by: Vandita Kulkarni <[email protected]>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     | 39 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_bios.h     |  1 +
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h |  7 ++++
>  3 files changed, 47 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 7b6a6f8c3cf1..7181237508b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -2788,12 +2788,45 @@ static bool is_port_valid(struct intel_display 
> *display,
> enum port port)
>       return true;
>  }
> 
> +int intel_bios_hdmi_max_frl_rate(const struct intel_bios_encoder_data
> +*devdata) {
> +     struct intel_display *display = devdata->display;
> +

Add a check for devdata as well to protect against any NULL pointer dereference.
Good to combine that with below check.

> +     if (display->vbt.version < 237)
> +             return 0;
> +
> +     /*
> +      * When hdmi_max_frl_rate_valid is 0 the VBT does not specify a
> maximum
> +      * FRL rate, so don't use it to limit the FRL rate on FRL-capable
> +      * platforms.
> +      */
> +     if (!devdata->child.hdmi_max_frl_rate_valid)
> +             return display->platform.meteorlake ? 12000000 : 0;
> +

Why special casing for MTL, or update the comment.

> +     switch (devdata->child.hdmi_max_frl_rate) {
> +     default:
> +     case HDMI_MAX_FRL_RATE_PLATFORM:
> +             return 0;
> +     case HDMI_MAX_FRL_RATE_3G:
> +             return 3000000;
> +     case HDMI_MAX_FRL_RATE_6G:
> +             return 6000000;
> +     case HDMI_MAX_FRL_RATE_8G:
> +             return 8000000;
> +     case HDMI_MAX_FRL_RATE_10G:
> +             return 10000000;
> +     case HDMI_MAX_FRL_RATE_12G:
> +             return 12000000;
> +     }
> +}
> +
>  static void print_ddi_port(const struct intel_bios_encoder_data *devdata)  {
>       struct intel_display *display = devdata->display;
>       bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb,
> supports_tbt;
>       int dp_boost_level, dp_max_link_rate, hdmi_boost_level, 
> hdmi_level_shift,
> max_tmds_clock;
>       enum port port;
> +     int hdmi_max_frl_rate;
> 
>       port = intel_bios_encoder_port(devdata);
>       if (port == PORT_NONE)
> @@ -2863,6 +2896,12 @@ static void print_ddi_port(const struct
> intel_bios_encoder_data *devdata)
>               drm_dbg_kms(display->drm,
>                           "Port %c VBT DP max link rate: %d\n",
>                           port_name(port), dp_max_link_rate);
> +
> +     hdmi_max_frl_rate = intel_bios_hdmi_max_frl_rate(devdata);
> +     if (hdmi_max_frl_rate)
> +             drm_dbg_kms(display->drm,
> +                         "Port %c VBT HDMI max FRL rate: %d\n",
> +                         port_name(port), hdmi_max_frl_rate);
>  }
> 
>  static void parse_ddi_port(struct intel_bios_encoder_data *devdata) diff 
> --git
> a/drivers/gpu/drm/i915/display/intel_bios.h
> b/drivers/gpu/drm/i915/display/intel_bios.h
> index 196b8b3f434f..b89f72d90c1f 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.h
> +++ b/drivers/gpu/drm/i915/display/intel_bios.h
> @@ -112,6 +112,7 @@ int intel_bios_hdmi_boost_level(const struct
> intel_bios_encoder_data *devdata);  int intel_bios_hdmi_ddc_pin(const struct
> intel_bios_encoder_data *devdata);  int intel_bios_hdmi_level_shift(const 
> struct
> intel_bios_encoder_data *devdata);  int intel_bios_hdmi_max_tmds_clock(const
> struct intel_bios_encoder_data *devdata);
> +int intel_bios_hdmi_max_frl_rate(const struct intel_bios_encoder_data
> +*devdata);
> 
>  void intel_bios_for_each_encoder(struct intel_display *display,
>                                void (*func)(struct intel_display *display, 
> diff --git
> a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index 0dc13d080e8a..db7484542dc0 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -381,6 +381,13 @@ struct bdb_general_features {
>  #define HDMI_MAX_DATA_RATE_340               4                       /* 249+ 
> */
>  #define HDMI_MAX_DATA_RATE_300               5                       /* 249+ 
> */
> 
> +#define HDMI_MAX_FRL_RATE_PLATFORM   0                       /* 237 */

Use 237+ to remain consistent, do it for all.

> +#define HDMI_MAX_FRL_RATE_3G         1                       /* 237 */
> +#define HDMI_MAX_FRL_RATE_6G         2                       /* 237 */
> +#define HDMI_MAX_FRL_RATE_8G         3                       /* 237 */
> +#define HDMI_MAX_FRL_RATE_10G                4                       /* 237 
> */
> +#define HDMI_MAX_FRL_RATE_12G                5                       /* 237 
> */
> +
>  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE              33
> 
>  /* DDC Bus DDI Type 155+ */
> --
> 2.50.1

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