From: Xi Zhang <[email protected]> No functional change intended. Clean up only.
The cached hw_pp should be the same as the ones from dpu_kms_get_existing_global_state during dpu_encoder_helper_phys_setup_cwb. Signed-off-by: Xi Zhang <[email protected]> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 24 +++--------------------- 1 file changed, 3 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 7d092398fc99..f1d2482b787b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2363,11 +2363,6 @@ void dpu_encoder_helper_phys_setup_cwb(struct dpu_encoder_phys *phys_enc, struct dpu_hw_ctl *hw_ctl; struct dpu_hw_cwb_setup_cfg cwb_cfg; - struct dpu_kms *dpu_kms; - struct dpu_global_state *global_state; - struct dpu_hw_blk *rt_pp_list[MAX_CHANNELS_PER_ENC]; - int num_pp; - if (!phys_enc->hw_wb) return; @@ -2379,33 +2374,20 @@ void dpu_encoder_helper_phys_setup_cwb(struct dpu_encoder_phys *phys_enc, return; } - dpu_kms = phys_enc->dpu_kms; - global_state = dpu_kms_get_existing_global_state(dpu_kms); - num_pp = dpu_rm_get_assigned_resources(&dpu_kms->rm, global_state, - phys_enc->parent->crtc, - DPU_HW_BLK_PINGPONG, rt_pp_list, - ARRAY_SIZE(rt_pp_list)); - - if (num_pp == 0 || num_pp > MAX_CHANNELS_PER_ENC) { - DPU_DEBUG_ENC(dpu_enc, "invalid num_pp %d\n", num_pp); - return; - } - /* * The CWB mux supports using LM or DSPP as tap points. For now, * always use LM tap point */ cwb_cfg.input = INPUT_MODE_LM_OUT; - for (int i = 0; i < MAX_CWB_PER_ENC; i++) { + for (int i = 0; i < ARRAY_SIZE(dpu_enc->hw_cwb); i++) { hw_cwb = dpu_enc->hw_cwb[i]; if (!hw_cwb) continue; if (enable) { - struct dpu_hw_pingpong *hw_pp = - to_dpu_hw_pingpong(rt_pp_list[i]); - cwb_cfg.pp_idx = hw_pp->idx; + cwb_cfg.pp_idx = i < ARRAY_SIZE(dpu_enc->hw_pp) && dpu_enc->hw_pp[i] ? + dpu_enc->hw_pp[i]->idx : PINGPONG_NONE; } else { cwb_cfg.pp_idx = PINGPONG_NONE; } -- 2.55.0
