From: Xi Zhang <[email protected]> cmd mode encoder previously did not clean up dsc, or LMs during disable.
Change to use the common dpu_encoder_helper_phys_cleanup function for cmd mode disable. Also do not set intf_cfg.mode_3d during disable: dpu_encoder_helper_get_3d_blend_mode accesses drm_encoder->crtc->state directly so intf_cfg.mode_3d weren't set to expected value for disable. intf_cfg.mode_3d is also ignored by ctl->ops.reset_intf_cfg. Signed-off-by: Xi Zhang <[email protected]> --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 10 +--------- 2 files changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 09afc0681248..0ab151369c99 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -2332,8 +2332,8 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc) dpu_enc->dsc = NULL; } - intf_cfg.stream_sel = 0; /* Don't care value for video mode */ - intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc); + intf_cfg.stream_sel = 0; /* Ignored by reset_intf_cfg */ + intf_cfg.mode_3d = 0; /* Ignored by reset_intf_cfg */ intf_cfg.dsc = dpu_encoder_helper_get_dsc(phys_enc); intf_cfg.cwb = dpu_enc->cwb_mask; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 45079ee59cf6..111f9dd5e053 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -538,7 +538,6 @@ static void dpu_encoder_phys_cmd_disable(struct dpu_encoder_phys *phys_enc) { struct dpu_encoder_phys_cmd *cmd_enc = to_dpu_encoder_phys_cmd(phys_enc); - struct dpu_hw_ctl *ctl; if (phys_enc->enable_state == DPU_ENC_DISABLED) { DPU_ERROR_CMDENC(cmd_enc, "already disabled\n"); @@ -566,14 +565,7 @@ static void dpu_encoder_phys_cmd_disable(struct dpu_encoder_phys *phys_enc) phys_enc->hw_pp->ops.disable_tearcheck(phys_enc->hw_pp); } - if (phys_enc->hw_intf->ops.bind_pingpong_blk) { - phys_enc->hw_intf->ops.bind_pingpong_blk( - phys_enc->hw_intf, - PINGPONG_NONE); - - ctl = phys_enc->hw_ctl; - ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx); - } + dpu_encoder_helper_phys_cleanup(phys_enc); phys_enc->enable_state = DPU_ENC_DISABLED; } -- 2.55.0
