"José Fonseca" wrote:
>
> For enabling DMA on Mach64 I'll need to allocate two extra DMA buffers: a
> primary DMA buffer and a decription table buffer.
>
> The way most cards (R128,MGA) do this is to map (on the DDX) pieces of AGP
> memory for these extra buffers, but this isn't possible with PCI only
> cards (i.e., without AGP/PCI GART) because the PCI memory is allocated
> just when the drmAddBufs call is made and not before with drmAGPAlloc
> drmScatterGatherAlloc calls.
>
> For example, the Gamma driver manages to add more buffers (a page table in
> this case) by making extra calls to drmAddBufs for allocating them, and
> then the DRM picks them up in the end of the buffers array, but I find
> this way not very versatile and a little cumbersome when one has more than
> one extra buffer to add.
>
> My question is if there is any other way to alloc PCI memory and why this
> assimetry of drmAddBufs behavior when dealing with non-GART memory?
>
> (Obviously I think that there should be a specific DRM ioctl to alloc an
> DMA buffer, e.g., drmAlloc, to map it seperately...)
Jose,
I don't have a complete answer for you, but here is *some* background
information that might help.
The drmAddBufs style was created with the origianal DRI infrastructure
that supported a partial implementation of the Gamma driver. Buffers
were short, and based out of PCI memory.
The first complete driver was the 3Dfx. It used MMIO and didn't need
any DMA buffers.
The second and third complete drivers were the i810 and mga. The were
the first to require AGP based DMA, and that's when the drmAGPAlloc
functionality was added.
I believe the AGP implementation is flexable about where the physical
pages reside, and can use the GART to make the pages appear contiguous
to both the 3D driver *and* the hardware.
For PCI DMA, I believe you need to allocate actual contiguous pages in
order for the hardware to see the memory as contiguous. This may be why
the mechanism is more cumbersome--or it could be that the PCI DMA case
just hasn't been fully flushed out.
I believe the r128 driver's PCI support still utilizes GART
functionality to allow non-contiguous memory to be utilized. Your
driver may be the first to need true PCI support, and *possibly* the
last to need it unless other legacy chipsets of the same era are
supported.
I hope this helps.
-- /\
Jens Owen / \/\ _
[EMAIL PROTECTED] / \ \ \ Steamboat Springs, Colorado
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