whoa. I really thought rv350 was the first chip (from ATI) which could do brilinear. fglrx does not always use 0x17 btw, that just seems to be a default value. You can only set that on a global level?
One could change the register value dynamically, as textures are used, but
this would require to wait for the pipeline to clear so the flag is applied to correct textures. I am not sure what kind of performance impact this could be.
best
Vladimir Dergachev
The effects you can see with r_colormipmaps in q3 are quite interesting. With this reg set to 0x0, you get full trilinear. With 0x1f, you get almost bilinear (mip transitions are very sharp, zero or one pixels turn out to be sampled from both mips). Some quick numbers: fglrx bi: 122 fps fglrx, bi, with colormips: 122 fps fglrx tri: 118 fps fglrx tri, with colormips: 109 fps fglrx bi, compressed: 124 fps fglrx tri, compressed: 121 fps fglrx tri, compressed, with colormips: 113 fps
r200 bi: 157 fps r200 tri: 127 fps r200 tri, with colormips: 127 fps r200 compressed, bi: 170 fps r200 compressed, tri: 149 fps
Unless the r200 chip can do some other tricks, these results strongly suggest to me that fglrx both adjusts the brilinear setting and autocompresses the textures (or instead may use 16-bit textures) in some cases (it might analyze the textures to do that). This actually isn't so surprising, I've experimented with forced auto-compression too some time ago, but Mesa isn't very well fitted for this sort of hack.
Would it be worth it to have the brilinear setting as a user-configurable option (defaulting to trilinear)?
Roland
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