Jerome,
On 1/13/07, Jerome Glisse <[EMAIL PROTECTED]> wrote:
>
> Is it something like this:
>
> BEGIN_RING(2);
> OUT_RING( CP_PACKET0( RADEON_SCRATCH_REG5, 0 ) ); \
> OUT_RING( 0xDEADBEEF); \
> ADVANCE_RING()
> COMMIT_RING()
Should be do the work, then you read the scratch reg via MMIO to see
if the value was set.
Alright, I tried that, but no luck.
I was able to read and write the register using a MMIO, but when I wrote to
the register with the CP, the value never showed up on in the register. (I
waited for the cp to idle before I read it back.. I also read it a few
seconds later..)
However, the read pointer IS advancing, so the cp must be doing something.
I suspect that it is just executing random commands. So, my current theory
is that:
1) The CP is actually working. (Because the read pointer is advancing..)
2) The ring buffer instructions are not being written where the card is
reading them from.
(BTW. I suspected that the Microcode might not be loading properly, but I
was able to read it back, and it matched what was written.)
...
I did a little more digging on this. It really looks like the address of "
ring.start" is completely different than what is in RADEON_CP_RB_BASE. (I
realize that ring.start is a virtual address and RADEON_CP_RB_BASE is a bus
address. However, the drmAddMap call in RADEONDRIPciInit sets the address
to 0, so I don't think it is setting 0x5800000 properly either...)
In any event, I think that the radeon DRM module and the card have a
completely different idea of where the ringbuffer is. (And as a result the
card is executing crap....)
I'm off to find out how all of those mappings work... (I also am going to
strace the fglrx driver to see how it sets them up...)
Does anyone know of any documents (other than:
http://www.xfree86.org/current/DESIGN9.html)
to help with understanding the mappings and how a GART/lack of GART would
interact?
I don't think there is any place for this except user account, you
could send it to me and i will put it in mine.
best,
Jerome Glisse
Ok. I have to fix a bug which causes some of the output to be incorrect.
Once I fix it, I'll send it to you in a personal email.
Cheers,
--Phil
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