Fifth of the patches that fixes the lines over 80 characters in reg.c
Signed-off-by: Iker Pedrosa <ikerpedro...@gmail.com>
---
drivers/staging/winbond/reg.c | 33 ++++++++++++++++++++++-----------
1 file changed, 22 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/winbond/reg.c b/drivers/staging/winbond/reg.c
index 6d2ab1e..11b155f 100644
--- a/drivers/staging/winbond/reg.c
+++ b/drivers/staging/winbond/reg.c
@@ -1242,46 +1242,57 @@ void RFSynthesizer_initial(struct hw_data *pHwData)
/* for LNA=10 -------- */
/* Calibration (5c-m). RX DC offset current bias ON; & LNA=10;
RXVGA=111111 */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x06<<24) | 0x342FCC, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x06<<24) | 0x342FCC, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (5d). turn on RX DC offset cal function; and
waiting 2 msec cal time */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFF6DC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFF6DC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(2000);
/* Calibration (5f). turn off ENCAL signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFAEDC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFAEDC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* for LNA=01 -------- */
/* Calibration (5c-m). RX DC offset current bias ON; & LNA=01;
RXVGA=111111 */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x06<<24) | 0x341FCC, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x06<<24) | 0x341FCC, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (5d). turn on RX DC offset cal function; and
waiting 2 msec cal time */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFF6DC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFF6DC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(2000);
/* Calibration (5f). turn off ENCAL signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFAEDC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFAEDC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* for LNA=00 -------- */
/* Calibration (5c-l). RX DC offset current bias ON; & LNA=00;
RXVGA=111111 */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x06<<24) | 0x340FCC, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x06<<24) | 0x340FCC, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (5d). turn on RX DC offset cal function; and
waiting 2 msec cal time */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFF6DC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFF6DC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(2000);
/* Calibration (5f). turn off ENCAL signal */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xFAEDC0, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xFAEDC0, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* Calibration (5g). turn on AGC servo-loop */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x01<<24) | 0xEFFFC2, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x01<<24) | 0xEFFFC2, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
/* ----- Calibration (7). Switch RF chip to normal mode */
/* 0x00 0xF86100 ; 3E184 ; Switch RF chip to normal mode */
- ltmp = (1 << 31) | (0 << 30) | (24 << 24) |
BitReverse((0x00<<24) | 0xF86100, 24);
+ ltmp = (1 << 31) | (0 << 30) | (24 << 24)
+ | BitReverse((0x00<<24) | 0xF86100, 24);
Wb35Reg_WriteSync(pHwData, 0x0864, ltmp);
usleep(5000);
break;
--
1.8.1.2
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