On 24 March 2016 at 21:30, Leo Duran <leo.du...@amd.com> wrote:
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Leo Duran <leo.du...@amd.com>
> ---
> ArmPlatformPkg/PrePeiCore/MainMPCore.c | 10 ++++++++--
> ArmPlatformPkg/PrePi/MainMPCore.c | 10 ++++++++--
> 2 files changed, 16 insertions(+), 4 deletions(-)
>
ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h has the
following defines
#define ARM_VE_SYS_FLAGS_SET_REG
(ARM_VE_BOARD_PERIPH_BASE + 0x00030)
#define ARM_VE_SYS_FLAGS_CLR_REG
(ARM_VE_BOARD_PERIPH_BASE + 0x00034)
#define ARM_VE_SYS_FLAGS_NV_REG
(ARM_VE_BOARD_PERIPH_BASE + 0x00038)
and is used on Juno as well as the older 32-bit archs. I don't know if
this is dead code now that PSCI is implemented by ARM trusted
firmware, and so we never bring up the secondaries in UEFI. But I
would like Leif's take on this when he gets back, since writing 64-bit
values is clearly not correct either in this particular case.
> diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
> b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
> index fa544c7..8309f62 100644
> --- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
> +++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
> @@ -80,13 +80,19 @@ SecondaryMain (
> ASSERT (Index != ArmCoreCount);
>
> // Clear Secondary cores MailBox
> - MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
> + if (sizeof(UINTN) == sizeof(UINT64))
> + MmioWrite64 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
> + else
> + MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
>
> do {
> ArmCallWFI ();
>
> // Read the Mailbox
> - SecondaryEntryAddr = MmioRead32
> (ArmCoreInfoTable[Index].MailboxGetAddress);
> + if (sizeof(UINTN) == sizeof(UINT64))
> + SecondaryEntryAddr = MmioRead64
> (ArmCoreInfoTable[Index].MailboxGetAddress);
> + else
> + SecondaryEntryAddr = MmioRead32
> (ArmCoreInfoTable[Index].MailboxGetAddress);
>
> // Acknowledge the interrupt and send End of Interrupt signal.
> AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32
> (PcdGicInterruptInterfaceBase), &InterruptId);
> diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c
> b/ArmPlatformPkg/PrePi/MainMPCore.c
> index 603f4bb..d7e2352 100644
> --- a/ArmPlatformPkg/PrePi/MainMPCore.c
> +++ b/ArmPlatformPkg/PrePi/MainMPCore.c
> @@ -79,13 +79,19 @@ SecondaryMain (
> ASSERT (Index != ArmCoreCount);
>
> // Clear Secondary cores MailBox
> - MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
> + if (sizeof(UINTN) == sizeof(UINT64))
> + MmioWrite64 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
> + else
> + MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress,
> ArmCoreInfoTable[Index].MailboxClearValue);
>
> do {
> ArmCallWFI ();
>
> // Read the Mailbox
> - SecondaryEntryAddr = MmioRead32
> (ArmCoreInfoTable[Index].MailboxGetAddress);
> + if (sizeof(UINTN) == sizeof(UINT64))
> + SecondaryEntryAddr = MmioRead64
> (ArmCoreInfoTable[Index].MailboxGetAddress);
> + else
> + SecondaryEntryAddr = MmioRead32
> (ArmCoreInfoTable[Index].MailboxGetAddress);
>
> // Acknowledge the interrupt and send End of Interrupt signal.
> AcknowledgeInterrupt = ArmGicAcknowledgeInterrupt (PcdGet32
> (PcdGicInterruptInterfaceBase), &InterruptId);
> --
> 1.9.1
>
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