On 19 April 2016 at 20:36, Duran, Leo <leo.du...@amd.com> wrote: > Leif, > Please see my reply below. > Leo. > >> -----Original Message----- >> From: Leif Lindholm [mailto:leif.lindh...@linaro.org] >> Sent: Monday, April 18, 2016 5:39 AM >> To: Ard Biesheuvel <ard.biesheu...@linaro.org> >> Cc: Duran, Leo <leo.du...@amd.com>; edk2-devel@lists.01.org >> Subject: Re: [PATCH] ArmPlatformPkg: fixups for 64-bit mailbox pointers >> >> On Thu, Mar 24, 2016 at 11:33:22PM +0100, Ard Biesheuvel wrote: >> > On 24 March 2016 at 21:30, Leo Duran <leo.du...@amd.com> wrote: >> > > Contributed-under: TianoCore Contribution Agreement 1.0 >> > > Signed-off-by: Leo Duran <leo.du...@amd.com> >> > > --- >> > > ArmPlatformPkg/PrePeiCore/MainMPCore.c | 10 ++++++++-- >> > > ArmPlatformPkg/PrePi/MainMPCore.c | 10 ++++++++-- >> > > 2 files changed, 16 insertions(+), 4 deletions(-) >> > > >> > >> > >> > ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h has >> the >> > following defines >> > >> > #define ARM_VE_SYS_FLAGS_SET_REG >> > (ARM_VE_BOARD_PERIPH_BASE + 0x00030) >> > #define ARM_VE_SYS_FLAGS_CLR_REG >> > (ARM_VE_BOARD_PERIPH_BASE + 0x00034) >> > #define ARM_VE_SYS_FLAGS_NV_REG >> > (ARM_VE_BOARD_PERIPH_BASE + 0x00038) >> > >> > and is used on Juno as well as the older 32-bit archs. I don't know if >> > this is dead code now that PSCI is implemented by ARM trusted >> > firmware, and so we never bring up the secondaries in UEFI. But I >> > would like Leif's take on this when he gets back, since writing 64-bit >> > values is clearly not correct either in this particular case. >> >> Yeah, these remain 32-bit also on Juno. >> >> Moreover, only user I see of this module in public code is FVP >> (OpenPlatformPkg), which should probably be investigated. >> >> Leo: do you actually need PrePeiCoreMPCore in the current version of your >> platform code? >> > > Leif, > The "mailbox" signaling is used to support MP-boot in scenarios where PSCI > may not be enabled. > (E.g., boot core uses mailbox to park AP cores in a "pen", and from there the > OS claims them via FDT's "spin-table" or ACPI's "Parked Address".) >
So in absence of PSCI support in EL3, the firmware residing there will boot all cores into UEFI? > Note that the ARM_CORE_INFO structure defines Mailbox[Set/Get/Clear]Address > as EFI_PHYSICAL_ADDRESS, which of course can be 64-bit. > Leo. > So the question is why the mailbox itself needs to be inside some magic peripheral, whereas the pen itself is simply in RAM. In fact, the PrePi version looks fairly broken in this regard, since the RAM it executes from doesn't look like it has any kind of protection from being clobbered by the kernel as soon as it loads if you are not using the linux loader. I guess the bottom line is that the ARM MPcore stuff in Tianocore is badly broken, and we should really keep the secondaries spinning in EL3 until the kernel is ready to release them. _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
