We also should consider ARM SOCs which have Internal ROM code running even before the ATF starts running in EL3. Such a internal ROM code might be configured to make sure that only the primary core runs the ATF and UEFI code and the secondaries enter the ATF code first time only when Linux does a secondary CPU_ON call.
Regards, Bhupesh ________________________________________ From: edk2-devel <edk2-devel-boun...@lists.01.org> on behalf of Ard Biesheuvel <ard.biesheu...@linaro.org> Sent: Monday, April 18, 2016 4:12:15 PM To: Leif Lindholm Cc: edk2-devel@lists.01.org; Leo Duran Subject: Re: [edk2] [PATCH] ArmPlatformPkg: fixups for 64-bit mailbox pointers On 18 April 2016 at 12:39, Leif Lindholm <leif.lindh...@linaro.org> wrote: > On Thu, Mar 24, 2016 at 11:33:22PM +0100, Ard Biesheuvel wrote: >> On 24 March 2016 at 21:30, Leo Duran <leo.du...@amd.com> wrote: >> > Contributed-under: TianoCore Contribution Agreement 1.0 >> > Signed-off-by: Leo Duran <leo.du...@amd.com> >> > --- >> > ArmPlatformPkg/PrePeiCore/MainMPCore.c | 10 ++++++++-- >> > ArmPlatformPkg/PrePi/MainMPCore.c | 10 ++++++++-- >> > 2 files changed, 16 insertions(+), 4 deletions(-) >> > >> >> >> ArmPlatformPkg/ArmVExpressPkg/Include/VExpressMotherBoard.h has the >> following defines >> >> #define ARM_VE_SYS_FLAGS_SET_REG >> (ARM_VE_BOARD_PERIPH_BASE + 0x00030) >> #define ARM_VE_SYS_FLAGS_CLR_REG >> (ARM_VE_BOARD_PERIPH_BASE + 0x00034) >> #define ARM_VE_SYS_FLAGS_NV_REG >> (ARM_VE_BOARD_PERIPH_BASE + 0x00038) >> >> and is used on Juno as well as the older 32-bit archs. I don't know if >> this is dead code now that PSCI is implemented by ARM trusted >> firmware, and so we never bring up the secondaries in UEFI. But I >> would like Leif's take on this when he gets back, since writing 64-bit >> values is clearly not correct either in this particular case. > > Yeah, these remain 32-bit also on Juno. > > Moreover, only user I see of this module in public code is FVP > (OpenPlatformPkg), which should probably be investigated. > > Leo: do you actually need PrePeiCoreMPCore in the current version of > your platform code? > I suppose the question here is whether all cores enter UEFI or only the boot CPU. If the EL3 firmware is doing PSCI, then only the boot core enters UEFI, and this code could be dropped or simplified. Note that there are some checks in the code still that prevent you from running the unicore version on a SMP system, so that should still be addressed afair _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
