Hi Ard, Here is the PE/COFF spec update for RISC-V. Already published. http://download.microsoft.com/download/9/C/5/9C5B2167-8017-4BAE-9FDE-D599BAC8184A/pecoff_v83.docx.
-----Original Message----- From: Chang, Abner (HPS SW/FW Technologist) Sent: Monday, May 09, 2016 10:35 PM To: 'Ard Biesheuvel' <[email protected]> Cc: Jordan Justen <[email protected]>; [email protected]; [email protected] Subject: RE: [edk2] [PATCH] MdeModulePkg/DxeIplPeim: RISC-V arch DxeIpl. Hi Ard, Yes. Microsoft has the definitions of RISC-V machine and relocation types in PE/COFF spec. The values of RISC-V image and relocation types were provided by us, so the values are consistent in both code and spec. In Feb this year, they said the new revision of PE/COFF spec is in the process of getting published. However, I didn’t get the notice yet. Thanks Abner -----Original Message----- From: Ard Biesheuvel [mailto:[email protected]] Sent: Monday, May 09, 2016 10:06 PM To: Chang, Abner (HPS SW/FW Technologist) <[email protected]> Cc: Jordan Justen <[email protected]>; [email protected]; [email protected] Subject: Re: [edk2] [PATCH] MdeModulePkg/DxeIplPeim: RISC-V arch DxeIpl. On 8 May 2016 at 13:19, Chang, Abner (HPS SW/FW Technologist) <[email protected]> wrote: > Hi Jordan, > The UEFI/PI ECR for RISC-V is ready but not yet send to UEFI for review. I > have been told to upstream RISC-V code first and then submit the spec. I will > confirm this again. Hello Abner, Is the PE/COFF support that you implemented based on the PE/COFF spec? Regards, Ard. _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
