Hi, Johnson:
Thanks for your reply!
I reviewed IA32 Manual, same as you said:
BSP is hardware selection when powering on a Multi-processor cores, software 
need do nothing!

Best wishes,

-----邮件原件-----
发件人: Brian J. Johnson [mailto:[email protected]] 
发送时间: 2014年10月22日 0:36
收件人: [email protected]
主题: Re: [edk2] [EDK2] Multi-processor Init in UEFI code

On 10/20/2014 05:50 AM, [email protected] wrote:
> Hi, experts:
>
> I am studying Intel 64 and IA-32 Architectures Software Developer’s 
> Manual Volume 3A.pdf .
>
> I have a few questions about Multi-processor management.
>
> 1.7.5 Multi-processor initialization In Chapter 7
>
> ……
>
> The mechanism for carrying out the MP initialization protocol differs 
> depending on the IA-32 processor family, as follows:
>
> (1) For P6 family processors― The selection of the BSP and APs (see 
> Section 7.5.1, “BSP and AP Processors”) is handled through arbitration 
> on the APIC bus, using BIPI and FIPI messages. See Appendix C, “MP 
> Initialization For P6 Family Processors,”for a complete discussion of 
> MP initialization for P6 family processors.
>
> (2) Intel Xeon processors with family, model, and stepping IDs up to 
> F09H― The selection of the BSP and APs (see Section 7.5.1, “BSP and AP
> Processors”) is
> handled through arbitration on the systembus, using BIPI and FIPI 
> messages (see Section 7.5.3, “MP Initialization Protocol Algorithm for 
> Intel Xeon Processors”).
>
> (3) Intel Xeon processors with family, model, and stepping IDs of F0AH 
> and beyond, 6E0H and beyond, 6F0H and beyond ― The selection of the 
> BSP and APs is handled through a special system bus cycle, without 
> using BIPI and FIPI message arbitration (see Section 7.5.3, “MP 
> Initialization Protocol Algorithm for Intel Xeon Processors”).
>
> So, current CPU(such as: bay trail ) uses method (2) or method (3) ?

For modern Xeons, it's all handled internally by the CPU hardware and 
microcode.  I don't believe BIOS needs to do anything, unless it wants to 
change which socket contains the BSP.  I don't know about Bay Trail; your best 
bet would be to check Intel's BIOS Writer's Guide for that platform, if you 
have access to it.  (That's what they call it for Xeon; I assume there's an 
equivalent for mobile.)

> 2.When to halt non-BSP cores in UEFI Code?
>
> Usually only BSP runs BIOS code.
> So when and where to halt non-BSP cores in UEFI Code?
> In CPU PEIM? Or SEC phase code?

That's a pretty platform-specific thing... servers try to initialize multiple 
sockets in parallel, but that wouldn't be a consideration for Bay Trail.
-- 

                                                 Brian Johnson

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