The theory states that 
   Power in = U I
   Power out ~ I*I*r

So power-in is linear with current. Power-out is quadratic with current.

Driving hard helps efficiency but hurts linearity. Max efficiency with LDMOS
is about 60% with reasonable linearity and no feedback, but could be > 70%
with predistortion.

Higher efficiency can be obtained in class C for CW/RTTY however wideband SS
designs are not suitable for class C. 

For low efficiency at lower power the best approach is to reduce the  supply
voltage. SPE gives a choice of 25V (1/3 power), 35V (half power) and 48V
(full power). New 4O3A (Flex) amplifier is supposed to adjust supply voltage
automatically for highest efficiency at a given power. 

Another choice is to use an external tuner for max power, not low SWR, as
e.g. at 1/4 power the optimum output impedance is 200 Ohms not 50 Ohms. 
Elecraft is using a trick in KX3 where at > 12 V and 5 W another ratio is
used in the final transformer, reducing power input by almost one half. 

Ignacy, NO9E







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