If you go to [1], then click on "view".  The source code header of 
SilComp.java has on line 6:

* Silicon compiler tool (QUISC): control 

The source code has comments in it suggesting that the implementation may 
be self-documented in the source code itself.  I don't recall ever seeing 
any other developer documentation for Electric, but if there was it may 
have been something only the internal development team at Oracle had access 
to.  Dr. Rubin could probably answer if he was able to take after 
retirement and could provide to us such documentation, if it existed. 

There are Verilog source code files such as VerilogParser.java in the 
directory at [2].  I remember reading in [3] that a user's experience with 
the Electric parser was that it lacked handling for standard Verilog.  The 
software developers have the following comment in VerilogParser.java line 
36:


* /** * A brain-dead, extremely limited verilog parser. In fact, it really *

** doesn't do anything except return a module name with it's port 
defintions. *

** *

** <P>Again, this is not meant to be a fully featured parser. It's error 
handling *
** is also not very useful. It is only meant to extract module names and 
their ports. */ * 

It would most likely be a nice addition if a user could contribute a 
modification to the source code to upgrade to the Electric Verilog for 
example to use the IEEE Standard for SystemVerilog [4]. 

[1] 
http://svn.savannah.gnu.org/viewvc/electric/trunk/electric/electric-java/com/sun/electric/tool/sc/SilComp.java
[2] 
http://svn.savannah.gnu.org/viewvc/electric/trunk/electric/electric-java/com/sun/electric/tool/simulation/test/
[3] https://digital.library.unt.edu/ark:/67531/metadc849770/
[4] https://standards.ieee.org/standard/1800-2017.html

Kind Regards,
Gavin
Electric VLSI user

On Tuesday, January 25, 2022 at 10:43:44 PM UTC-7 [email protected] wrote:

> Hi ElectricVLSI!
>
> I got some info of the Behavioral Representation from an old VLSI book 
> written by NIEL H.E. Weste/Kamran Eshragran that BR representation 
> describes how a particular design should respond to a given set of inputs. 
> Behavior may be specified by Boolean equations, tables of input and output 
> values, or algorithms written in standard high level computer languages or 
> special Hardware Description Languages (HDLs). The Latter include VHDL, 
> Verilog and ELLA.
> When Electric was Developed did the Engineers documented the 
> Implementation of the Silicon Compiler in Java? If we need to upgrade the 
> electric tool to convert BD to SD we might need algorithms of all digital 
> circuits like for example adder, multiplier, etc... I guess it will be in 
> Java.
>
> Just my opinion.
>
> BR, Joselito
>
> On Wed, Jan 26, 2022 at 1:08 PM Steven Rubin <[email protected]> 
> wrote:
>
>> To be able to handle behavioral Verilog, the compiler (in Electric) needs 
>> to be upgraded so it can do the conversion from behavior to structure.
>>
>>    -Steven Rubin
>> On 1/25/2022 8:36 PM, Ashwin Balagopal S ee17d200 wrote:
>>
>> Oh that's interesting. I tried it out and it worked pretty well. 
>>
>> What needs to happen to be able to get it to synthesise behavioural 
>> netlists?
>>
>> Ashwin
>>
>> On Sun, 23 Jan, 2022, 9:56 pm Steven Rubin, <[email protected]> 
>> wrote:
>>
>>> Electric has placement and routing tools as well as a rudimentary 
>>> "Silicon Compiler". You can read both VHDL and Verilog but they must be 
>>> structural, not behavioral (which limits things). Then the automated tools 
>>> can be run. It's not production-quality, but it works.
>>>
>>>    -Steven Rubin
>>> On 1/23/2022 12:03 AM, '2020 11049' via Electric VLSI Editor wrote:
>>>
>>> Hello, 
>>>
>>> Can we generate automatic layout by any means in Electric VLSI. Like by 
>>> using Verilog code to generate layout or any similar thing possible in 
>>> Electric VLSI.
>>>
>>>

-- 
You received this message because you are subscribed to the Google Groups 
"Electric VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to [email protected].
To view this discussion on the web visit 
https://groups.google.com/d/msgid/electricvlsi/c06d5960-2353-48de-a687-d9503edec187n%40googlegroups.com.

Reply via email to