On Thu, 11 Mar 2010, Stephen Wille Padnos wrote:

> Date: Thu, 11 Mar 2010 21:37:32 -0500
> From: Stephen Wille Padnos <spad...@sover.net>
> Reply-To: "Enhanced Machine Controller (EMC)"
>     <emc-users@lists.sourceforge.net>
> To: "Enhanced Machine Controller (EMC)" <emc-users@lists.sourceforge.net>
> Subject: Re: [Emc-users] Beagle Board
> 
> Peter C. Wallace wrote:
>> [snip]
>> Yeah, just build up a little corral for the chip with maybe 5 mils or so slop
>> on each side. (surface tension will bring chip into alignment when the solder
>> balls melt) liberally flux and apply hot air gun to back of card, no solder
>> paste needed. I wouldn't _ship_ anything done this way, but its OK for 
>> protos.
>> Also do the BGA(s) first so you can sight underneath the chip to check for
>> shorts...
>>
> Do you do anything special in the layout so that heat transfers well
> from the other side of the board?  Something like adding a small via on
> each pin or that kind of thing.
>
> I think I may have to make a board with a BGA part on it in the next
> couple of weeks, so I'm wondering if I should do anything special (so I
> can avoid the $150/board assembly costs for prototypes).
>
> Thanks
> - Steve

No, but it does take some practice with a hot air gun so you dont burn the 
card, A hot plate (alu plate with heater and thermostat) works as well

When doing this I preheat the whole card to ~150C then focus the heat on the 
reverse side of the BGA.


Ive done down to .8 mm BGAs and up to 484 pins but not smaller pitch or more 
pins. I would not do this for anything other than a proto with low cost BGAs
(You may need to practice a few times before getting it right)

I make my "corral" with scrap PCB material tack soldered to the main PCB a 
a distance from the FPGA

>
>
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Peter Wallace
Mesa Electronics

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------------------------------------------------------------------------------
Download Intel&#174; Parallel Studio Eval
Try the new software tools for yourself. Speed compiling, find bugs
proactively, and fine-tune applications for parallel performance.
See why Intel Parallel Studio got high marks during beta.
http://p.sf.net/sfu/intel-sw-dev
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