On Sat, 19 Feb 2011, Jon Elson wrote: > Date: Sat, 19 Feb 2011 14:08:40 -0600 > From: Jon Elson <[email protected]> > Reply-To: "Enhanced Machine Controller (EMC)" > <[email protected]> > To: "Enhanced Machine Controller (EMC)" <[email protected]> > Subject: Re: [Emc-users] Servo counts > > Roland Jollivet wrote: >> >> So what I'm wondering is why do the Mesa cards use 32 bit counters for the >> encoders? >> >> Would a 16bit counter not suffice? It just seems that there is a lot of time >> spent reading redundant numbers from encoders, and that things could be >> simplified with 16 bits. >> >> > I use a 24-bit counter on my parallel port-connected boards. Rollover > definitely happens on systems with higher resolution or long travels, > and is handled by the driver. The Mesa cards that plug into a PCI slot > don't have to worry as much about the overhead of reading 32-bit > registers. Rollover is less likely on those, but still possible. Yes, > a 16-bit counter would have been sufficient on my boards, mostly I used > 24 as that is what was provided by the Servo-to-Go board (LS7166 > chips). I was trying to stay as close to the STG in functionality as I > could. > > But, I'm not sure moving down to a 16-bit counter is much of a > simplification. > > Jon >
And we have a similar situation with our EPP based cards, because we want the driver to see the same register set for all our cards whether EPP, USB, PCI Ethernet or whatever. So there are some inefficiencies inhernet in the commonality. So far this has not been a real issue. There actually is capability in our EPP interface firmware to do arbitary byte sequence reads and writes with no addressing overhead (via the TRAM) so you could write a specialized 7I43 driver that only reads 8 bits of encoder count if you so wished. OP: So this gives me an idea: If you want only 8 bit count, one thing to consider is to maintain a larger count, but only read the high half if needed (by the samplerate and maximum encder count rate) Peter Wallace Mesa Electronics ------------------------------------------------------------------------------ The ultimate all-in-one performance toolkit: Intel(R) Parallel Studio XE: Pinpoint memory and threading errors before they happen. Find and fix more than 250 security defects in the development cycle. Locate bottlenecks in serial and parallel code that limit performance. http://p.sf.net/sfu/intel-dev2devfeb _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
