On 05/26/2012 12:52 PM, Peter C. Wallace wrote: <snip> > 2. Some configurations do not have B inputs as they are just used for counting > applications. In this case the counter will always count down (since > unconnected inputs are terminated in a 0 state internally in the FPGA) > > > Peter Wallace > > This is my understanding; I tried changing the state of B input without a change in the count direction; maybe I hit the wrong pin. As long as count mode provides valid rate information, I'll plan on using scaling - or is there an absolute value hal comp?
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