Yes indeed it is.

I got error and after a while figured out a write to configuration register 
from master need to be acknowledge in status register from slave via SPI, there 
also was a problem with SPI fifo causing read of old values with big confusion. 
I have some error in sync manager configuration but that I will figure out and 
with check for this disabled it enter operational state!


I have not yet fully figured out the purpose of sync manager and FMMU. Neither 
about the configuration procedure. It's my first try and sooner or later I will 
figure out.



> Wow... that's great!
> 
> Dave
> 
> On 12/24/2017 6:44 AM, Nicklas Karlsson wrote:
> > I just got SPI started on my Ethercat LAN9252 board. It turned out SPI MISO 
> > where configured twice.
> >
> > For some reason I think almost all manufacturers choose to configure by pin 
> > so for peripheral input pins it is possible to configure more than one pin 
> > and get a collision. I remember Microchip got this correct: for peripheral 
> > inputs a source could be selected and for pin outputs configuration a 
> > peripheral output could be selected. It is also have the advantage a signal 
> > may be used at more than place.
> >
> > For some reason most manufacturers have chosen to write headers specifice 
> > for micro controller instead of peripheral specific even though same 
> > peripheral usually is the same on all micro controllers in the family. I 
> > remember Texas instrument got this correct and wrote a pdf-file specific 
> > for each peripheral although I do not remember about header files. I have 
> > been thinking about porting the header filer on perihpheral basis to ADA 
> > but never get time.
> >
> >
> > Nicklas Karlsson
> >
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