Displacement of the cross slide while cutting a hex head is proportional to the sin of the spindle angle. Very much like the height of a piston is proportional to the angle of the crank
Draw a picture of a hexagon and then make a line that crosses one of the flats at some odd angle. Figure out how long this line is. At first it seems hard then you draw a second line from center to one of the hex's points and now you have a triangle with two angles and one side known. The function that drives the cross slide is basically a sine. You can look up "Angle Side Angle" or "cosine law" in Wikipedia. The exact same thing could be used to "turn" a flat on a shaft On Mon, Jul 13, 2020 at 11:49 AM Gene Heskett <ghesk...@shentel.net> wrote: > On Monday 13 July 2020 13:56:47 Chris Albertson wrote: > > > Actually making a hex head on the lathe would best be done using a > > microcontroller. FPGAs can compute trig functions but I think the > > method used is to first implement a "soft CPU" and then run code > > written in C that uses math.h That is a silly-expensive why to > > replace a $5 STM32 chip. > > > > But really, the Lathe spindle does not run so fast and you can write > > this code as a HAL component that runs in the Servo loop. I wanted > > out how I would do this last night and was stumped on the math until I > > remembered the law of cosines and "SAS" triangle problems from some > > class I took in the 10th grade. Look those up on Wikipedia and then > > it is not hard to computer the cross slide position as a function of > > spindle angle. > > > > The hard part is getting such a good cross slide setup with no play of > > backlash > > Does 2 thou count? But I'd be more concerned with following error. A cam > for valve motion is not a sine wave by quite a long row of apple trees. > > > On Mon, Jul 13, 2020 at 9:35 AM Gene Heskett <ghesk...@shentel.net> > wrote: > > > On Monday 13 July 2020 12:00:19 Peter C. Wallace wrote: > > > > > > > > > ROTFLMAO, Peter see's right thru us. ;-) But seriously, the FPGA > > > does seem like the ideal place for such a module. On chip com with > > > the chosen stepgenerator removes that particular bandwidth limit. I > > > could also see it doubleing the size of the FPGA needed so its not > > > going to be free. I think, not knowing the first thing about > > > writing FPGA code. :-( > > > > > > [.. > > > Cheers, Gene Heskett > -- > "There are four boxes to be used in defense of liberty: > soap, ballot, jury, and ammo. Please use in that order." > -Ed Howdershelt (Author) > If we desire respect for the law, we must first make the law respectable. > - Louis D. Brandeis > Genes Web page <http://geneslinuxbox.net:6309/gene> > > > _______________________________________________ > Emc-users mailing list > Emc-users@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-users > -- Chris Albertson Redondo Beach, California _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users
