Greetings all; I've printed the STM docs on this chip, which does leave a gap between whats on the board and theory.
It would appear that when enabled, and lets say with a pwm frequency near the top of the 10khz range, that a 50% duty cycle pwm waveform would be the equ of a balanced, at rest servo, so my first question is how much additional inductance in series with the motors leakage reactance will be needed to protect the chip from the current surges at the pwm waveforms transition points? My hal file will obviously need to stage an initial enable at the 50% duty points, then let the pid output thru. I did take a peak at the encoder, and it looks to be optical with about 100 stripes per motor rev. So I'm a bit puzzled that my scope measures it at 5.4 kilohertz running free on the table. Quadrature looks very very good, perhaps a 1% timing wobble for either pulse. A mesa encoder should give a pretty noise free outout. That, and the fact that STM characterizes it running in a 13 volt automotive environment despite its 40 volt rating. Seems to me they are useing that additional headroom to compensate for some pretty crappy motors. And I have no clue what this motor looks like with power applied, along with a 50% pwm while seeing 24 volts on the motor power input pins. Cheers, Gene Heskett -- "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) If we desire respect for the law, we must first make the law respectable. - Louis D. Brandeis Genes Web page <http://geneslinuxbox.net:6309/gene> _______________________________________________ Emc-users mailing list Emc-users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-users