Flex-Radio-Friends
Re-Flex-ion
The SDR-1000/PowerSDR has come light years in just a few months since I have been a part of the forum. I have contributed very little towards any finite advancement of the The Radio but I guess as it says on the Flexi, I am the Goodwill Ambassador. Perhaps just glue.
SDR with a 1.16 * 10 (-12) GPS Discipline Clock TCVCXO frequency standard.
That produces an SDR 1000 radio accurate to 1 Hz in 10 GHZ. This can already be done with an HP 3801(?) for around $200 on the surplus market, but would be and is a current initiative by Alan K2WS and myself to investigate other alternatives besides surplus. There are several designs for the 10 MHz discipline tco out there, and perhaps Tony can whack off a copy of the circuit. Alan will have a report on Teamspeak Saturday forum on 6-25-05. I have already purchased the Rockwell Jupiter GPS Receiver 12 CH Board NEW w/ BONUS of an external antenna! For $49 off EBay. Bill KD5TFD and I were playing around with Google after the forum last night and found about 20 of these GPS OEM boards with Serial interface and 10 kHz slave oscillators, on E-bay. With this add-on, the PowerSDR modification would make a laboratory grade, oscilloscope, frequency counter, spectrum analyzer and ???!
There's a "better way" to do this. Rather than find a good 10 MHz oscillator and discipline it, and then feed it into the DDS chip where it gets multiplied up (increasing the phase noise by the multiplication ratio)...
Use the existing low phase noise oscillator at roughly 200MHz on the board. Measure its frequency using your 1pps from the GPS receiver. (or, alternately, measure the DDS output frequency). Adjust the programmed frequency for the DDS to correct for the measured frequency error.
For instance, say the DDS ref oscillator is supposed to be 180 MHz, and you want to tune to 20 MHz. You measure 180.1 MHz using the 1pps tick from the GPS. So, you need to program the DDS not for 20 MHz, but for 19.9889505 MHz.
You may ask, why do this, rather than disciplining an oscillator?
1) If the oscillator has a control port (i.e. a VCXO), any noise on that port adds phase noise.
2) If the oscillator is controllable in the first place (as in a typical TCXO, which uses a capacitor with a temperature coefficient to "push" the crystal frequency), the crystal can't be as high Q, which means the close in phase noise is higher.
3) Feeding the reference clock in at 10 MHz will require multiplying up by 18 or 20 to get the DDS clock, and that will increase the phase noise by roughly 20Log10(N), or 26 dB. Unless the phase noise of your 10 MHz source is at least 26 dB quieter than the low jitter oscillator on the board, this is a losing proposition.
A much bigger source of error, by the way, is the fairly "drifty" sampling clock in the PC. I have 4 SDR-1000s in a breadboard system and have actually done some of these measurements. With frequency measurements of the little packaged oscillator on the SDR1000 board, and doing simple linear forward estimation, you can fairly easily reduce the frequency error to about 5ppb (1 sigma, tau=200 ms). For what it's worth, the frequency error changed about 100 ppb in one second (that's 1 Hz out of 10 MHz, by the way). It's VERY temperature sensitive; i.e. blowing on the oscillator or turning on and off a cooling fan, shifts the frequency noticeably, but, with a fairly long time constant.
The sampling clock in the PC, on the other hand, changes about 500 ppm in the same one second interval. Again, measuring every 200 millseconds and doing linear forward estimation reduces the residual error to around 20 ppm (1 sigma). Now, this was with the A/D on the motherboard (a VIA fanless 533 MHz mobo), so some of the frequency error might actually be analog noise, etc. The input signals were set so that they were about -6dBFS into the audio "card"
Here's some numbers for the SDR clock phase noise, compared to a reasonably inexpensive ($300) low noise 10 MHz ovenized oscillator.(Wenzel 501-04609A)
Wenzel
10 Hz, -130 dBc/Hz
100 Hz, -155 dBc/Hz
1kHz, -165 dBc/Hz
10kHz, -165 dBc/Hz
ValpeyFisher VF161L (XO at 200 MHz) is specified at <1pS jitter for fj>1 kHz.. Jitter is essentially an integrated phase spec and converting from phase noise to jitter is nontrivial.
However, the Wenzel oscillator is calculated to have 2.21E-14 seconds jitter (i.e. 0.022 ps) for fj>10 Hz, and 1.2E-14 seconds for fj>1kHz. (that's 0.01 pS... about a hundred times better than the Valpey Fisher).
But, you'll have to multiply the 10MHz oscillator up by 20.. Running Wenzel's little spreadsheet and raising all the phase noises by 26 dB (assuming the multiplication is perfect), I come up with a phase jitter (>1 kHz) of 0.24 ps, which probably isn't all that far from what the Valpey Fisher oscillator can do.
There's also the fact that when you're in multiply mode, you're really depending on the performance of the oscillator on the DDS, too. The jitter/phase noise MUST be worse than that fed in at the reference clock (since there's inevitably some noise introduced internally).
--- The upshot here is that feeding in an external 10 MHz may NOT be the best way to get optimum performance, and since you can always correct the frequency using the DDS, you might be better off just measuring the 200 MHz oscillator, and correcting appropriately.
Spacecraft Radio Frequency Subsystems Group
Flight Communications Systems Section
Jet Propulsion Laboratory, Mail Stop 161-213
4800 Oak Grove Drive
Pasadena CA 91109
tel: (818)354-2075
fax: (818)393-6875
