Lyle Thanks. Well not too difficult to divide the 200 by 10 externally and perhaps provide buffering for the 200 mhz sig coming out of the SDR.
Eric2 -----Original Message----- From: Lyle Johnson [mailto:[EMAIL PROTECTED] Sent: Wednesday, November 23, 2005 5:11 PM To: ecellison Cc: 'Jeff Anderson'; 'Jim Lux'; '[EMAIL PROTECTED] Biz' Subject: Re: [Flexradio] frequency calibration etc > .... Can an FPGA > pin actually accept a 10 mhz or 200 mhz signal so that the LE's could be > configured to divide it down? 10 MHz is no problem. 200 MHz! Many FPGAs can handle this frequency, some go faster, many can't go quite this fast. 73, Lyle KK7P
