On 10:42 AM 11/06/2001 -0500, Tim Hutcheson said:
>The simplest mechanism, but one which satisfies my needs and avoids the
>larger issues of gate swapping, is to synch using the PCB netlist generated
>from copper and the Schematic generated netlist.  This could be a well
>managed operation, initiated from the Schematic that generates both the
>schematic netlist and the connected copper netlist in one operation,
>compares them and updates the schematic - with no intervening steps by the
>user to throw it out of synch.  The user could add resistor packs on the
>schematic with out concern for their pinouts, go to the PCB and connect the
>copper, return to the schematic and synchronize them and get the corrected
>pins.
>
>The problem with this approach is to keep the scope limited enough to
>actually get something useful without it being killed in committee because
>all the ideas can't be accomplished. Sound familiar?
>
>regards,
>
>Tim Hutcheson

The Update Sch process (within PCB) does much of what you want except for 
the actual rewiring/gate swapping.  This is the sticking point. It already 
compares the sch netlist with the PCB one (except it does not use the 
actual copper to produce the PCB netlist - but this could be a synchroniser 
option).

I seems to me that there needs to be either:
1) A re-wire server that can make and break connections for you, rewiring 
the sch.  Imagine the mess!
or
2) Some method of saying in the Sch Lib part what gates/pins can swap with 
what.  In the case of a pull-up style resnet than all 8 resistor 
connections would be allowed to swap with all other resistor connections - 
only the common pin would be unswappable. For series style resnets then 
there would have to be ate swapping rather than pin swapping as the two 
sides of the series resistors have to move together.  So it seems to me 
that to implement what you want is not as simple as saying it.  You want 
useful gate swapping, I think.

How can we achieve that?  I think having the ability within the Sch Lib of 
setting what can swap with what is the safest.  This may not always be as 
simple as saying all the individual parts of a symbol can swap willy-nilly 
as sometimes not all the parts of a components are the same.  So there 
might need to be a "pin-swap" group attribute that can be set to no-swap, 
group A, group B etc.  All group-A sections can swap with all other group A 
sections etc. There may even be a case to allow PCB allow rules that permit 
gate swapping between components - so you have a pool of inverters, say, 
that you will specifically allow to pool gates.   But then it would get 
even better if the PCB on-line DRC and rats nest manager could hook into 
the gate swap stuff and automatically update the ratsnest as nets were 
routed including, maybe, on-the-fly as a track is brought near a swappable 
pin.  Now wouldn't that be a nice feature! Good for marketing and, if it 
worked, useful.

Sorry if this is this the committee stuff you are worried about? :-)

Ian

* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* To post a message: mailto:[EMAIL PROTECTED]
*
* To leave this list visit:
* http://www.techservinc.com/protelusers/subscrib.html
*                      - or email -
* mailto:[EMAIL PROTECTED]?body=leave%20proteledaforum
*
* Contact the list manager:
* mailto:[EMAIL PROTECTED]
*
* Browse or Search previous postings:
* http://www.mail-archive.com/[email protected]
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * *

Reply via email to