At 09:45 AM 6/28/01 +1000, van de Werken, Matthew (DEM, PH) wrote:
>Is there a quick way of checking the state, without actually doing the
>synchronisation? I have around a hundred or so boards to check in 3 ddb's,
>so I'd really like this to be quick. I HATE doing the same thing over and
>over (and I also HATE fixing other people's mess, but anyway...).
There a number of ways to do this, I don't know which is the fastest.
(1) You could use the synchronizer. You want to preview the changes, not
make them. Uncheck just about everything, you want to "synchronise" only
the net assignments. You can then generate a report. Don't let the
synchronizer complete until you know what is going on, good chance the
board is correct and the schematic is not, particularly if the designers
have been sloppy.
(2) Generate a net list from the PCB and a netlist from the schematic and
use the netlist comparison tool in Schematic (I think it is Reports/Compare
Netlists). The netlists should be identical. It would also be a good idea
to run DRC in the PCB as well as ERC in the schematic. Again, if the
designers were sloppy, expect the latter to be a big mess. But clean
documentation, properly configured will DRC and ERC with no errors, almost
without exception.
(3) Create a netlist from the Schematic and load this into the PCB. If
there are any duplicate pad names (such as multiple instances of
J1-SHIELD), this could be problematic, but most designs don't have these.
My a priori preference would be for (2), precisely because it is the same
thing, over and over. Sorry....
You might be able to make some macros that would speed it up. Or hire
someone else to do it. I've got contacts for inexpensive design support, so
contact me directly if you are interested in this.
Abd ul-Rahman Lomax
LOMAX DESIGN ASSOCIATES
PCB design, consulting, and training
Protel EDA license resales
Sonoma, California, USA
(707) 939-7021, efax (419) 730-4777
[EMAIL PROTECTED]
[EMAIL PROTECTED]
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