https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81346
--- Comment #17 from Gergö Barany <gergo.barany at inria dot fr> ---
Thanks for fixing this. I did notice a small thing that might be considered a
tiny regression due to the fix.
If the divisor is a small power of 2, as in the following example:
int fn1(char p1) {
long a;
char b;
int c = a = 4;
b = !(p1 / a);
if (b)
c = 0;
return c;
}
the division used to be replaced by a shift that updated the condition code
register (again, on ARM; r250337):
lsrs r3, r0, #2
movne r0, #4
moveq r0, #0
bx lr
whereas after the fix (tested on r250342) the new folding rule takes precedence
and generates one instruction more:
add r0, r0, #3
cmp r0, #6
movhi r0, #4
movls r0, #0
bx lr
I guess the rule could be updated to only apply if the divisor is not a small
power of 2, or folding a division by a power of 2 into a shift could be
prioritized.
Sorry about only pointing this out two months later! Also, let me stress that I
do not have code that depends on this transformation. This came out of research
I'm doing on missed optimization, and this was one example I found interesting.
