https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81346
--- Comment #18 from Marc Glisse <glisse at gcc dot gnu.org> --- (In reply to Gergö Barany from comment #17) > the division used to be replaced by a shift that updated the condition code > register (again, on ARM; r250337): (just my opinion) At a high level (gimple), (unsigned)x+3<=6 seems like a more canonical way to represent an interval than x/4==0. If the second one turns out to be more efficient on some targets, it sounds like we could later turn (unsigned)x+3<=6 into x/4==0 (even if the user did not write it that way), i.e. add a new transform at RTL time. Looks like a separate enhancement request would be appropriate.
