[Bug target/71233] [ARM, AArch64] missing AdvSIMD intrinsics

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71233

--- Comment #47 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Kyrylo Tkachov
<ktkac...@gcc.gnu.org>:

https://gcc.gnu.org/g:b8442a7c4c09375b76fa174313205fa7fcbfb016

commit r10-8809-gb8442a7c4c09375b76fa174313205fa7fcbfb016
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date:   Tue Sep 22 12:00:38 2020 +0100

    AArch64: Implement missing vceq*_p* intrinsics

    This patch implements some missing vceq* intrinsics on poly types.
    The behaviour is to produce the appropriate CMEQ instruction as for the
unsigned types.

    Bootstrapped and tested on aarch64-none-linux-gnu.

    gcc/
            PR target/71233
            * config/aarch64/arm_neon.h (vceqq_p64, vceqz_p64, vceqzq_p64):
Define.

    gcc/testsuite/

            PR target/71233
            * gcc.target/aarch64/simd/vceq_poly_1.c: New test.

    (cherry picked from commit d4703be185b422f637deebd3bb9222a41c8023d6)