[Bug target/99195] Optimise away vec_concat of 64-bit AdvancedSIMD operations with zeroes in aarch64

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195

--- Comment #12 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkac...@gcc.gnu.org>:

https://gcc.gnu.org/g:c8977cf5f2daa9fecfc5d67a737506d0d31c578a

commit r14-653-gc8977cf5f2daa9fecfc5d67a737506d0d31c578a
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date:   Wed May 10 11:50:01 2023 +0100

    aarch64: PR target/99195 annotate simple saturating add/sub patterns for
vec-concat-zero

    Moving onto the saturating instructions, this one goes through the simple
add/sub ones.
    Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.

    gcc/ChangeLog:

            PR target/99195
            * config/aarch64/aarch64-simd.md
(aarch64_<su_optab>q<addsub><mode>):
            Rename to...
            (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
            (aarch64_<sur>qadd<mode>): Rename to...
            (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.

    gcc/testsuite/ChangeLog:

            PR target/99195
            * gcc.target/aarch64/simd/pr99195_1.c: Add testing for qadd, qsub.
            * gcc.target/aarch64/simd/pr99195_6.c: New test.